Georgian Partners
Overview
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Responsibilities
Design and development of emulation infrastructure for system in packages (SiPs) for high-performance AI/ML engines. Develop DV and hardware emulation ecosystem. Build flow for single and multi-chiplet DV environment and emulation platforms with best frequency, emulation footprint combination. Create test benches for single/multi chiplet models with transactors, monitors, and harnesses. Own and develop test plans focusing on unique functional coverage, performance, power extraction and low level software development. Maximize debuggability and automation of the build and run flows. Create multi-user environment for optimal usage and resource sharing. Develop custom transactors, monitors, checkers etc. Create a support system to maximize engineering efficiency of emulation customers. Cross-functional work with Architects, Software and Design/Verification/Emulation teams to define and improve emulation platform. Guide and mentor junior engineers. Experience & Qualifications
BS/MS/PhD in EE/ECE/CE/CS with at least 10 years of industry experience working with ASICs or SoC teams. Expert understanding of logic design, verification and mapping design to emulation hardware. Expert knowledge of commercial emulators like ZeBu, Palladium, Veloce. Expertise in verilog/systemVerilog/C++/systemC. Expertise in DV and emulation tools and flows, scripting and automation. Strong problem solving skills. Excellent organizational and communication skills, oral and written. Experience with Synopsys Zebu. Knowledge of prototyping with HAPS or Xilinx/Altera FPGAs. Knowledge of C/C++/systemC. Knowledge of hardware/architectures relating to one or more of RISC-V, ML, fabric, die-2-die, memory controllers, PCIe, UCIe. Understanding of sister workflows like virtual prototyping, and power analysis. Compensation, Benefits & Compliance
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.
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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Responsibilities
Design and development of emulation infrastructure for system in packages (SiPs) for high-performance AI/ML engines. Develop DV and hardware emulation ecosystem. Build flow for single and multi-chiplet DV environment and emulation platforms with best frequency, emulation footprint combination. Create test benches for single/multi chiplet models with transactors, monitors, and harnesses. Own and develop test plans focusing on unique functional coverage, performance, power extraction and low level software development. Maximize debuggability and automation of the build and run flows. Create multi-user environment for optimal usage and resource sharing. Develop custom transactors, monitors, checkers etc. Create a support system to maximize engineering efficiency of emulation customers. Cross-functional work with Architects, Software and Design/Verification/Emulation teams to define and improve emulation platform. Guide and mentor junior engineers. Experience & Qualifications
BS/MS/PhD in EE/ECE/CE/CS with at least 10 years of industry experience working with ASICs or SoC teams. Expert understanding of logic design, verification and mapping design to emulation hardware. Expert knowledge of commercial emulators like ZeBu, Palladium, Veloce. Expertise in verilog/systemVerilog/C++/systemC. Expertise in DV and emulation tools and flows, scripting and automation. Strong problem solving skills. Excellent organizational and communication skills, oral and written. Experience with Synopsys Zebu. Knowledge of prototyping with HAPS or Xilinx/Altera FPGAs. Knowledge of C/C++/systemC. Knowledge of hardware/architectures relating to one or more of RISC-V, ML, fabric, die-2-die, memory controllers, PCIe, UCIe. Understanding of sister workflows like virtual prototyping, and power analysis. Compensation, Benefits & Compliance
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.
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