Northrop Grumman
Sr. Principal Digital Integration and Test Engineer - R10210555
Northrop Grumman, Linthicum, Maryland, United States
Overview
Sr. Principal Digital Integration and Test Engineer – R10210555 Base pay range: $144,200.00/yr - $216,400.00/yr Relocation assistance may be available. Clearance Type: Top Secret. Travel: Yes, 10% of the time. Location: Linthicum, MD. Responsibilities
Provide or present I&T tests and/or plans, activities or status at program technical reviews or other technical meetings Develop I&T Verification and Validation matrices for processing subsystems, board designs and FPGA logic designs based on compliance requirements, and support validation at the component, board and subsystem levels Design, develop, create and modify Electric Ground Support Equipment (EGSE) for I&T activities Lead and direct engineering teams during integration & test of digital subsystems and products Design, develop, create and modify test scripts utilizing Xilinx and Microchip FPGAs Plan, execute, and oversee the integration and test activities for Payload Support Electronics (PSE) Ensure PSE meets performance, functional, interface and requirements before delivery to Payload level Develop PSE integration plans and procedures Coordinate with ECA designers and systems to ensure test readiness Manage integration of HW/SW and FW at the PSE level Coordinate with the Test Equipment Team Develop and execute detailed test procedures to verify functionality and interfaces Participate in design reviews, Test Readiness Reviews (TRRs) and formal verification activities Support payload level integration with higher level assemblies and tests FlatSat planning for PSE Assist Integrated Product Team lead with test plan development, I&T schedule development, resource requirements and risk management Document I&T specifications for internal and external development teams Evaluate and mitigate technical risk of I&T system requirements and implementations HW troubleshooting/debug skills and ability to read/understand electrical schematics Work with lab resource team and network administrator to define lab requirements and develop lab setup Engineer Basic Qualifications
Bachelor’s degree in engineering or STEM-related discipline with 8 years of relevant engineering experience (6+ years with MS degree; or 3+ years with PhD) Experience with the use of various FPGAs or the development of HDL (Verilog and VHDL) code within the corresponding Integrated Development Environment (IDE) U.S. Citizenship required No Clearance required to start, but must be able to obtain and maintain a DoD Top-Secret security clearance Preferred Qualifications
Experience as technical lead or other similar leadership role with demonstrated team building, organizational, and interpersonal skills Experience translating customer requirements and/or functional block diagrams into realized I&T test plans, procedures or test scripts Fluency with developing and executing technical development plans Basic understanding of the Design, Manufacturing, and Test process Problem-solving experience in a team environment Active TS/SCI Digital test and Digital test requirements development experience Deep technical skills covering subsystem (box/LRU level), ASIC, FPGA and/or board design and troubleshooting skills Embedded networking or high-speed protocols experience (Ethernet, PCIe, Interlaken, InfiniBand, etc.) Demonstrated ability to analyze and troubleshoot RF subsystems, complex mixed-signal ECAs and RF modules using schematics, component design documents, and basic lab test equipment Ability to provide solutions to a broad variety of RF/Microwave design and test related problems of complex difficulty Basic understanding of the Design, Manufacturing, and Test process Exhibit intermediate to expert proficiency with industry standard RF/Microwave modeling, simulation and PCB design tools (e.g. ANSYS HFSS/Maxwell, CST Microwave, Eagleware/Genesys, Keysight ADS, Xpedition, Altium, FEKO, TICRA) Interest in mentoring/teaching/growing junior engineers Some signal processing familiarity Experience with scripting languages such as TCL, Python or Perl Experience Integrating a system containing digital hardware, software and firmware Ability to multi-task and apply good time management Note on compensation and benefits
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, company paid holidays and PTO. Equal Opportunity
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO.
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Sr. Principal Digital Integration and Test Engineer – R10210555 Base pay range: $144,200.00/yr - $216,400.00/yr Relocation assistance may be available. Clearance Type: Top Secret. Travel: Yes, 10% of the time. Location: Linthicum, MD. Responsibilities
Provide or present I&T tests and/or plans, activities or status at program technical reviews or other technical meetings Develop I&T Verification and Validation matrices for processing subsystems, board designs and FPGA logic designs based on compliance requirements, and support validation at the component, board and subsystem levels Design, develop, create and modify Electric Ground Support Equipment (EGSE) for I&T activities Lead and direct engineering teams during integration & test of digital subsystems and products Design, develop, create and modify test scripts utilizing Xilinx and Microchip FPGAs Plan, execute, and oversee the integration and test activities for Payload Support Electronics (PSE) Ensure PSE meets performance, functional, interface and requirements before delivery to Payload level Develop PSE integration plans and procedures Coordinate with ECA designers and systems to ensure test readiness Manage integration of HW/SW and FW at the PSE level Coordinate with the Test Equipment Team Develop and execute detailed test procedures to verify functionality and interfaces Participate in design reviews, Test Readiness Reviews (TRRs) and formal verification activities Support payload level integration with higher level assemblies and tests FlatSat planning for PSE Assist Integrated Product Team lead with test plan development, I&T schedule development, resource requirements and risk management Document I&T specifications for internal and external development teams Evaluate and mitigate technical risk of I&T system requirements and implementations HW troubleshooting/debug skills and ability to read/understand electrical schematics Work with lab resource team and network administrator to define lab requirements and develop lab setup Engineer Basic Qualifications
Bachelor’s degree in engineering or STEM-related discipline with 8 years of relevant engineering experience (6+ years with MS degree; or 3+ years with PhD) Experience with the use of various FPGAs or the development of HDL (Verilog and VHDL) code within the corresponding Integrated Development Environment (IDE) U.S. Citizenship required No Clearance required to start, but must be able to obtain and maintain a DoD Top-Secret security clearance Preferred Qualifications
Experience as technical lead or other similar leadership role with demonstrated team building, organizational, and interpersonal skills Experience translating customer requirements and/or functional block diagrams into realized I&T test plans, procedures or test scripts Fluency with developing and executing technical development plans Basic understanding of the Design, Manufacturing, and Test process Problem-solving experience in a team environment Active TS/SCI Digital test and Digital test requirements development experience Deep technical skills covering subsystem (box/LRU level), ASIC, FPGA and/or board design and troubleshooting skills Embedded networking or high-speed protocols experience (Ethernet, PCIe, Interlaken, InfiniBand, etc.) Demonstrated ability to analyze and troubleshoot RF subsystems, complex mixed-signal ECAs and RF modules using schematics, component design documents, and basic lab test equipment Ability to provide solutions to a broad variety of RF/Microwave design and test related problems of complex difficulty Basic understanding of the Design, Manufacturing, and Test process Exhibit intermediate to expert proficiency with industry standard RF/Microwave modeling, simulation and PCB design tools (e.g. ANSYS HFSS/Maxwell, CST Microwave, Eagleware/Genesys, Keysight ADS, Xpedition, Altium, FEKO, TICRA) Interest in mentoring/teaching/growing junior engineers Some signal processing familiarity Experience with scripting languages such as TCL, Python or Perl Experience Integrating a system containing digital hardware, software and firmware Ability to multi-task and apply good time management Note on compensation and benefits
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, company paid holidays and PTO. Equal Opportunity
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO.
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