Tenstorrent Inc.
Sr Staff CPU Core/Unit Verification Engineer, Functional Safety
Tenstorrent Inc., Austin, Texas, us, 78716
Sr Staff CPU Core/Unit Verification Engineer, Functional Safety
Austin, Texas, United States Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists has developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a passionate and detail-oriented Design Verification Engineer to join our Functional Safety (FuSa) IP team. You will work on verifying safety-critical IPs designed to meet ISO 26262/ASIL-B/ASIL-D and similar safety standards, ensuring correctness, robustness, and resilience. The ideal candidate will bring strong verification fundamentals and an interest (or experience) in safety verification. We welcome candidates at various experience levels for this role. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced DV engineer with SystemVerilog, C++ and UVM expertise. Strong interest in safety-critical design and understanding of ISO 26262 ISO (ASIL levels B–D) or other safety standards. Able to work independently and deliver in a highly accountable environment. Team player who communicates clearly and thrives in cross-functional teams. What We Need Ability to build C++/UVM environments and author safety-focused test plans. Experience with fault injection, resilience testing, or safety diagnostics. Hands-on experience with Synopsys VC Z01X, Siemens Tessent or Cadence Safety Verification for fault simulation and analysis. Work closely with safety architects and designers to validate safety mechanisms and analyze fault simulation results to measure and report diagnostic coverage (SPFM, LFM, PMHF). What You Will Learn Practical verification for IPs with ASIL-level safety requirements. Functional Safety methodologies and compliance tracking in real projects. Integration of safety IPs into CPU and system architectures. Development of cutting-edge safety features in next-gen compute platforms. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded. Apply for this job
* indicates a required field First Name * Last Name * Email * Phone Country Phone Resume/CV Enter manually Accepted file types: pdf, doc, docx, txt, rtf Website LinkedIn Profile How many years of work experience do you have? * 0-2 3-7 8+ Voluntary Self-Identification
For government reporting purposes, we ask candidates to respond to the below self-identification survey. Completion of the form is voluntary. Any information you provide will be confidential and used for equal employment opportunity compliance. Tenstorrent is an equal employment opportunity employer. Voluntary Self-Identification of Disability information is requested for compliance with OFCCP/EEO requirements. Participation is voluntary. You may choose to skip this form without it affecting your opportunity for employment. If you have questions, contact the employer’s HR representative. Disability Status Select... PUBLIC BURDEN STATEMENT: This survey should take about 5 minutes to complete.
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Austin, Texas, United States Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists has developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a passionate and detail-oriented Design Verification Engineer to join our Functional Safety (FuSa) IP team. You will work on verifying safety-critical IPs designed to meet ISO 26262/ASIL-B/ASIL-D and similar safety standards, ensuring correctness, robustness, and resilience. The ideal candidate will bring strong verification fundamentals and an interest (or experience) in safety verification. We welcome candidates at various experience levels for this role. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced DV engineer with SystemVerilog, C++ and UVM expertise. Strong interest in safety-critical design and understanding of ISO 26262 ISO (ASIL levels B–D) or other safety standards. Able to work independently and deliver in a highly accountable environment. Team player who communicates clearly and thrives in cross-functional teams. What We Need Ability to build C++/UVM environments and author safety-focused test plans. Experience with fault injection, resilience testing, or safety diagnostics. Hands-on experience with Synopsys VC Z01X, Siemens Tessent or Cadence Safety Verification for fault simulation and analysis. Work closely with safety architects and designers to validate safety mechanisms and analyze fault simulation results to measure and report diagnostic coverage (SPFM, LFM, PMHF). What You Will Learn Practical verification for IPs with ASIL-level safety requirements. Functional Safety methodologies and compliance tracking in real projects. Integration of safety IPs into CPU and system architectures. Development of cutting-edge safety features in next-gen compute platforms. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded. Apply for this job
* indicates a required field First Name * Last Name * Email * Phone Country Phone Resume/CV Enter manually Accepted file types: pdf, doc, docx, txt, rtf Website LinkedIn Profile How many years of work experience do you have? * 0-2 3-7 8+ Voluntary Self-Identification
For government reporting purposes, we ask candidates to respond to the below self-identification survey. Completion of the form is voluntary. Any information you provide will be confidential and used for equal employment opportunity compliance. Tenstorrent is an equal employment opportunity employer. Voluntary Self-Identification of Disability information is requested for compliance with OFCCP/EEO requirements. Participation is voluntary. You may choose to skip this form without it affecting your opportunity for employment. If you have questions, contact the employer’s HR representative. Disability Status Select... PUBLIC BURDEN STATEMENT: This survey should take about 5 minutes to complete.
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