Akkodis
Benefits
PTO, 401K, Medical, Dental and more
Salary Range 130,000-200,000 with potential negotiation based on experience, education, geographic location, and other factors
Interview Process 1st - Phone Interview, 2nd - Virtual Interview, 3rd - Final Round Interview
Key Responsibilities
Design memory subsystems including memory modules and memory cards which interface to system memory buses (DDRx, LPDDRx, PCIe, CXL)
Develop new techniques for increasing memory bandwidth, reducing power consumption and thermal dissipation while maintaining enterprise level Reliability, Accessibility, and Serviceability (RAS) requirements.
Cross functional collaboration is significant but technical depth
Design and optimize memory subsystems to boost performance, efficiency and reliability
Document system architecture and processes
Work with electrical, thermal/mechanical, and CAD engineers to implement new designs.
Generate and maintain documentation for system architecture, configurations, and procedures.
Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering or related field and five years experience in system engineering or related work experience.
Knowledge of memory technologies and protocols including DDR4/5/6, LPDDR4/5/6, NAND flash.
Knowledge of error detection and correction techniques including ECC and CRC algorithms.
Excellent problem-solving and communication skills.
Preferred Qualifications
5+ years of work in DRAM and/or Flash based memory industry.
Knowledge of memory controller design and optimization.
Knowledge of SoC architecture and HBM3/4.
Seniority Level Mid-Senior level
Employment Type Full-time
Job Function Engineering and Design
EEO and Privacy Statement To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit https://www.akkodis.com/en/privacy-policy
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
· The California Fair Chance Act
· Los Angeles City Fair Chance Ordinance
· Los Angeles County Fair Chance Ordinance for Employers
· San Francisco Fair Chance Ordinance
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Salary Range 130,000-200,000 with potential negotiation based on experience, education, geographic location, and other factors
Interview Process 1st - Phone Interview, 2nd - Virtual Interview, 3rd - Final Round Interview
Key Responsibilities
Design memory subsystems including memory modules and memory cards which interface to system memory buses (DDRx, LPDDRx, PCIe, CXL)
Develop new techniques for increasing memory bandwidth, reducing power consumption and thermal dissipation while maintaining enterprise level Reliability, Accessibility, and Serviceability (RAS) requirements.
Cross functional collaboration is significant but technical depth
Design and optimize memory subsystems to boost performance, efficiency and reliability
Document system architecture and processes
Work with electrical, thermal/mechanical, and CAD engineers to implement new designs.
Generate and maintain documentation for system architecture, configurations, and procedures.
Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering or related field and five years experience in system engineering or related work experience.
Knowledge of memory technologies and protocols including DDR4/5/6, LPDDR4/5/6, NAND flash.
Knowledge of error detection and correction techniques including ECC and CRC algorithms.
Excellent problem-solving and communication skills.
Preferred Qualifications
5+ years of work in DRAM and/or Flash based memory industry.
Knowledge of memory controller design and optimization.
Knowledge of SoC architecture and HBM3/4.
Seniority Level Mid-Senior level
Employment Type Full-time
Job Function Engineering and Design
EEO and Privacy Statement To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit https://www.akkodis.com/en/privacy-policy
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
· The California Fair Chance Act
· Los Angeles City Fair Chance Ordinance
· Los Angeles County Fair Chance Ordinance for Employers
· San Francisco Fair Chance Ordinance
#J-18808-Ljbffr