Intel
Senior Design Technology Co-Optimization Circuits Analysis Engineer
Intel, Austin, Texas, us, 78716
Overview
We are seeking a Senior Design Technology Co-Optimization Circuits Analysis Engineer to join our DTCO team. This role focuses on analyzing and optimizing circuit performance through advanced modeling, simulation, and cross-functional collaboration between design and technology teams. The successful candidate will drive circuit-level analysis to enable optimal technology node development and design methodology improvements. Circuit Analysis & Modeling
Perform detailed circuit analysis using industry-standard simulation tools (SPICE, Spectre, etc.). Develop and maintain circuit models for various technology nodes and process variations. Analyze circuit performance metrics including timing, power, area, and reliability. Create and validate compact models for emerging device technologies. Design-Technology Co-Optimization
Collaborate with process technology teams to optimize device characteristics for circuit performance. Work with design teams to understand circuit requirements and translate them into technology specifications. Perform trade-off analysis between different technology options and design approaches. Support technology roadmap planning through circuit-level performance projections. Methodology Development
Develop and improve circuit analysis methodologies and flows. Create automated analysis scripts and tools to enhance productivity. Establish best practices for circuit characterization and optimization. Support the development of design rules and guidelines. Cross-Functional Collaboration
Partners with Technology Development, Design Engineering, and CAD teams. Present analysis results and recommendations to technical and management teams. Support customer engagements and foundry service activities. Participate in design reviews and technology milestone assessments. Soft Skills
Strong analytical and problem-solving abilities. Excellent communication skills. Ability to work effectively in cross-functional teams. Detail-oriented with strong organizational skills. Self-motivated with ability to manage multiple projects simultaneously. Minimum Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master’s degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study and 12+ years of relevant experience. Experience in circuit design, analysis, or related semiconductor roles. Experience on parametric analysis and debug on advanced technology node SPICE models. Experience with CMOS technology and device physics fundamentals. Experience with Silicon to Model Calibration. Experience with Standard Cell Library Characterization. Experience in analysis of .lib impact on digital PPA. Experience in signoff and Variation analysis on timing critical paths. Preferred Qualifications
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Post graduate degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study. Experience in analysis of .lib impact on digital PPA. Experience in signoff and Variation analysis on timing critical paths. Experience with machine learning applications in circuit optimization. Experience with EDA tool development and customization. Experience in foundry or fabless semiconductor environment. Publications in relevant technical conferences or journals. Job Details
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Texas, Austin Additional Locations: Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: (link removed) Work Model
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust: N/A
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We are seeking a Senior Design Technology Co-Optimization Circuits Analysis Engineer to join our DTCO team. This role focuses on analyzing and optimizing circuit performance through advanced modeling, simulation, and cross-functional collaboration between design and technology teams. The successful candidate will drive circuit-level analysis to enable optimal technology node development and design methodology improvements. Circuit Analysis & Modeling
Perform detailed circuit analysis using industry-standard simulation tools (SPICE, Spectre, etc.). Develop and maintain circuit models for various technology nodes and process variations. Analyze circuit performance metrics including timing, power, area, and reliability. Create and validate compact models for emerging device technologies. Design-Technology Co-Optimization
Collaborate with process technology teams to optimize device characteristics for circuit performance. Work with design teams to understand circuit requirements and translate them into technology specifications. Perform trade-off analysis between different technology options and design approaches. Support technology roadmap planning through circuit-level performance projections. Methodology Development
Develop and improve circuit analysis methodologies and flows. Create automated analysis scripts and tools to enhance productivity. Establish best practices for circuit characterization and optimization. Support the development of design rules and guidelines. Cross-Functional Collaboration
Partners with Technology Development, Design Engineering, and CAD teams. Present analysis results and recommendations to technical and management teams. Support customer engagements and foundry service activities. Participate in design reviews and technology milestone assessments. Soft Skills
Strong analytical and problem-solving abilities. Excellent communication skills. Ability to work effectively in cross-functional teams. Detail-oriented with strong organizational skills. Self-motivated with ability to manage multiple projects simultaneously. Minimum Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master’s degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study and 12+ years of relevant experience. Experience in circuit design, analysis, or related semiconductor roles. Experience on parametric analysis and debug on advanced technology node SPICE models. Experience with CMOS technology and device physics fundamentals. Experience with Silicon to Model Calibration. Experience with Standard Cell Library Characterization. Experience in analysis of .lib impact on digital PPA. Experience in signoff and Variation analysis on timing critical paths. Preferred Qualifications
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Post graduate degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study. Experience in analysis of .lib impact on digital PPA. Experience in signoff and Variation analysis on timing critical paths. Experience with machine learning applications in circuit optimization. Experience with EDA tool development and customization. Experience in foundry or fabless semiconductor environment. Publications in relevant technical conferences or journals. Job Details
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Texas, Austin Additional Locations: Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: (link removed) Work Model
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust: N/A
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