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We are now hiring for a Senior Library Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice, join our diverse team today. The Advanced Technologies Group is looking to hire a Library Design Engineer in our group. Do you have a proven EE background with an in-depth understanding of circuits, simulation, library characterization and static timing analysis? Enjoy working on the cutting edge of process technologies? Have strong programming skills? If you answered yes to all above, then we have a job that might be a good fit for you! The job will be at our company headquarters in Santa Clara, CA. What you'll be doing: Characterize standard cell libraries for advanced process technologies

Develop and support extraction environments for standard cell characterization

Develop flows to generate standard cell IR and thermal views

Analyze tradeoffs between different standard cell architectures

Collaborating with cross functional teams to drive PPA targets and provide guidance

Analyzing foundry device models & layout dependent effects, collaborate with device group for spice to silicon correlation

Automate characterization flows, model evaluation and publishing process to improve efficiency

Validate aging and self-heating effects of device models

What we need to see: B.S or M.S. in Electrical Engineering or equivalent experience

5+ years industry experience

An understanding of transistor device behavior, layout dependent device behavior, aging and self-heating effects on advanced FinFET and GAA process nodes

Strong background in Standard cell design and layout on advanced process nodes

Hands-on experience with standard cell timing, power, statistical characterization and modeling. Familiar with advanced variation modeling techniques

Strong experience with gate level spice simulations, variation analysis and parasitic extractions.

Experience with industry standard layout/schematic editor, physical verification, timing characterization and parasitic extraction tools

We are looking for someone with excellent programming skills

Scripting experience with Perl/Python. Layout automation with Cadence Skill is an additional advantage. Familiarity with debugging timing reports

Great interpersonal skills

A passion for working closely with foundry partners and providing excellent support for end-users

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and

benefits . Applications for this job will be accepted at least until July 29, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr