Nokia
Sr Principal Analog Test & Characterization Engineer
Nokia, San Jose, California, United States, 95199
Qualifications
Good understanding of lab test equipment and common clocking devices, including but not limited to oscillators, oscilloscopes, network analyzers, phase noise analyzers, power supplies, multimeters, and logic analyzers. Familiar with PCB design issues and design impact on high performance mixed signal ASIC/test chip performance. Be able to review PCB layout and give suggestions for workarounds to help debug HW or ASIC. Have good programming skills and can write efficient programs or scripts in Perl, LabView, Python, and/or Matlab to facilitate the characterization and debug of ASICs. Have knowledge in analog/mixed signal circuit design. Have a good understanding in PC board level design and debugging. Fluent in verbal and written communications. Have good general analytical skills. Be a good team player. Decent understanding in the reliability (HTOL, ESD) testing flow, and willing to work with the third party to conduct the reliability tests. Having experiences interfacing with third party testing house regarding wafer sort and final ATE. M.S. or Ph.D. in EE, Physics or related fields. Responsibilities
Use verification test benches and create lab test scripts and ensure results are as expected. Create lab test scripts to configure DUT/EVB, make measurements using lab instruments, and output the results. Create automated lab flow which allows 24/7 testing and characterization of IP test chips and ASIC products. Work with the design team to create the test validation documentation, including but not limited to specifications, test procedures, and testing results, as well as maintain and upload all documentation to file server. Review the package and PCB designs to facilitate the package and EVB design/manufacturing for the test chips and product chips. Work with the design team to debug and characterize the mixed signal IP test chips and ASICs. Write and support design engineers to create test scripts to facilitate taking measurements. If necessary, travel to other INFN ASIC locations to support testing activities. Interact with system teams to validate the ASIC performance while in system. Imagine being part of a team that is fundamentally changing the way people communicate, the way they collaborate, the way they watch TV and explore the universe through the internet. Utilizing our uniquely differentiated technology, we have created an Intelligent Transport Network with more speed, capacity and scalability than ever before. Imagine a world with unlimited bandwidth. The network of tomorrow will allow for content and creativity limited only by the imaginations of its users. Be part of the industry leading high-speed high-performance analog/mixed signal design team! Here you’ll have the chance to play an important role in terms of validating and characterizing the top-notch high-speed/high-performance IPs.
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Good understanding of lab test equipment and common clocking devices, including but not limited to oscillators, oscilloscopes, network analyzers, phase noise analyzers, power supplies, multimeters, and logic analyzers. Familiar with PCB design issues and design impact on high performance mixed signal ASIC/test chip performance. Be able to review PCB layout and give suggestions for workarounds to help debug HW or ASIC. Have good programming skills and can write efficient programs or scripts in Perl, LabView, Python, and/or Matlab to facilitate the characterization and debug of ASICs. Have knowledge in analog/mixed signal circuit design. Have a good understanding in PC board level design and debugging. Fluent in verbal and written communications. Have good general analytical skills. Be a good team player. Decent understanding in the reliability (HTOL, ESD) testing flow, and willing to work with the third party to conduct the reliability tests. Having experiences interfacing with third party testing house regarding wafer sort and final ATE. M.S. or Ph.D. in EE, Physics or related fields. Responsibilities
Use verification test benches and create lab test scripts and ensure results are as expected. Create lab test scripts to configure DUT/EVB, make measurements using lab instruments, and output the results. Create automated lab flow which allows 24/7 testing and characterization of IP test chips and ASIC products. Work with the design team to create the test validation documentation, including but not limited to specifications, test procedures, and testing results, as well as maintain and upload all documentation to file server. Review the package and PCB designs to facilitate the package and EVB design/manufacturing for the test chips and product chips. Work with the design team to debug and characterize the mixed signal IP test chips and ASICs. Write and support design engineers to create test scripts to facilitate taking measurements. If necessary, travel to other INFN ASIC locations to support testing activities. Interact with system teams to validate the ASIC performance while in system. Imagine being part of a team that is fundamentally changing the way people communicate, the way they collaborate, the way they watch TV and explore the universe through the internet. Utilizing our uniquely differentiated technology, we have created an Intelligent Transport Network with more speed, capacity and scalability than ever before. Imagine a world with unlimited bandwidth. The network of tomorrow will allow for content and creativity limited only by the imaginations of its users. Be part of the industry leading high-speed high-performance analog/mixed signal design team! Here you’ll have the chance to play an important role in terms of validating and characterizing the top-notch high-speed/high-performance IPs.
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