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XConn Technologies Holdings Inc.

Senior SOC Validation Engineer

XConn Technologies Holdings Inc., San Jose, California, United States, 95199

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Company Description Founded in 2020 by a team of Silicon Valley veterans, XConn Technologies Holdings Inc. aims to accelerate AI computing in data centers and high-performance computing (HPC). Our mission is achieved through high-performance, power-efficient, scalable, and cost-effective interconnect solutions. We are pioneers in leveraging CXL (Computing Express Link) technology to transform data center architectures. With strong funding and a team with extensive experience in data center interconnects and switching, we are positioned to play a crucial role in the evolving CXL ecosystem.

Senior SOC Post-silicon Validation Engineer Senior SOC Post-silicon Validation engineer to validate PCIE/CXL Switch. SOC validation engineers use the silicon evaluation platform, Software, and other test equipment to test the functionality and design of products, programs, and other tools. They work before the production phase of the SOC, and collaborate with design teams to verify their designs. The validation engineer is responsible for ensuring the compliance of a product with its specifications.

Responsibilities

Develop test plans: Create validation plans based on specifications and in coordination with architects and customer use cases

Define test methodologies: Establish and implement validation and testing standards and policies

Perform feature and performance validation: Write scripts, run regressions, debug, and analyze to required quality levels and schedules

Perform electrical compliance test specifications / compliance test suite for various interfaces and conduct lab measurements

Work on high-speed serial I/O interfaces like PCIE Gen1-6, and peripheral interfaces such as SPI, I2C, etc.

Document: Create technical manuals and other materials, and produce and maintain detailed documentation related to validation activities and outcomes

Collaborate: Work with other engineers from different teams such as board design, software, architecture, design, and performance analysis,

Mentor: Encourage and train junior members of the team

Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams

Basic Qualifications

Bachelor’s or Master's degree or higher in EE, ECE, or CS

5+ years of experiences for SOC/ASIC/FPGA validation and PCIE Functional or Electrical testing

High speed serial interface analog building blocks, protocol, specifications and test methods

Experience with PCIE Gen5/6 Protocol Analyzer

Proficiency in handling High Bandwidth oscilloscopes, BERT, logic analyzers and understanding of probing.

Preferred Qualifications

BS/MS/ME in Computer Science, Electrical Engineering, or related field

Writing Python/C++ code to automate test procedures

Good software architecture principles and development practices

Scripting experience in any programming language (C++, Python, PERL, MATLAB) to develop automation scripts is a plus.

Experience in Analog IP Characterization (SerDes, PLL, DDR) is desirable.

Employment Type Full-time

Seniority Level Mid-Senior level

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