Kforce Inc
Senior/Principal Design Engineer (Board Design)
Kforce Inc, Costa Mesa, California, United States, 92626
Senior or Principal Hardware Design Engineer – Board Design
Kforce Inc. is seeking an experienced hardware design engineer to design and develop high‑speed circuit boards for next‑generation wireline communication systems. The role will collaborate with cross‑functional teams, lead DVT platform development, and ensure signal integrity and performance compliance.
Compensation Base salary: $125,000 – $190,000 per year. Additional annual bonus and stock/RSU awards.
Responsibilities
Architect and design high‑performance design verification test (DVT) boards for validating transceiver technologies across multiple generations and protocols (PCIe, Ethernet, PAM4).
Collaborate with RFIC designers, system architects, packaging, and test engineers to define board‑level requirements and validation strategies.
Select components, create schematics, and oversee PCB layout optimized for signal integrity, power delivery, and thermal performance.
Develop and execute test plans for electrical characterization, including jitter, eye diagram, BER, impedance, and crosstalk measurements.
Integrate lab instrumentation (VNA, BERT, oscilloscopes) to validate board performance.
Debug and optimize board‑level performance to meet stringent specifications for high‑speed links.
Document design processes, validation results, and provide feedback to silicon and system teams.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Physics, or similar field.
3–7+ years of experience in high‑speed board design and validation.
Proficiency in PCB design tools (Cadence Allegro, Altium, or similar) and simulation tools (SI/PI analysis, HFSS, ADS).
Strong understanding of signal integrity, power integrity, and high‑speed layout techniques.
Experience with lab equipment and/or RF/Digital test methodologies.
Excellent problem‑solving, documentation, and communication skills.
Preferred
Familiarity with protocol compliance testing (IEEE, USB, PCIe).
Knowledge of thermal and mechanical constraints in board design.
Experience with test automation and data analysis tools.
Experience with transceiver technologies or other high‑speed design is a plus.
Automate test setups using scripting languages (Python, MATLAB) is a plus.
Experience with the design of DVT boards would be a plus.
Benefits
Medical, dental, vision insurance.
HSA, FSA, 401(k) with company match.
Life, disability, and ADD insurance.
Paid time off and annual bonus.
Equal Opportunity Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.
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Compensation Base salary: $125,000 – $190,000 per year. Additional annual bonus and stock/RSU awards.
Responsibilities
Architect and design high‑performance design verification test (DVT) boards for validating transceiver technologies across multiple generations and protocols (PCIe, Ethernet, PAM4).
Collaborate with RFIC designers, system architects, packaging, and test engineers to define board‑level requirements and validation strategies.
Select components, create schematics, and oversee PCB layout optimized for signal integrity, power delivery, and thermal performance.
Develop and execute test plans for electrical characterization, including jitter, eye diagram, BER, impedance, and crosstalk measurements.
Integrate lab instrumentation (VNA, BERT, oscilloscopes) to validate board performance.
Debug and optimize board‑level performance to meet stringent specifications for high‑speed links.
Document design processes, validation results, and provide feedback to silicon and system teams.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Physics, or similar field.
3–7+ years of experience in high‑speed board design and validation.
Proficiency in PCB design tools (Cadence Allegro, Altium, or similar) and simulation tools (SI/PI analysis, HFSS, ADS).
Strong understanding of signal integrity, power integrity, and high‑speed layout techniques.
Experience with lab equipment and/or RF/Digital test methodologies.
Excellent problem‑solving, documentation, and communication skills.
Preferred
Familiarity with protocol compliance testing (IEEE, USB, PCIe).
Knowledge of thermal and mechanical constraints in board design.
Experience with test automation and data analysis tools.
Experience with transceiver technologies or other high‑speed design is a plus.
Automate test setups using scripting languages (Python, MATLAB) is a plus.
Experience with the design of DVT boards would be a plus.
Benefits
Medical, dental, vision insurance.
HSA, FSA, 401(k) with company match.
Life, disability, and ADD insurance.
Paid time off and annual bonus.
Equal Opportunity Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.
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