ROHDE & SCHWARZ GmbH & Co. KG
Mixed Signal ICs System Architect
ROHDE & SCHWARZ GmbH & Co. KG, Hillsboro, Oregon, United States, 97104
Overview
As part of this team, you will have an opportunity to architect and work on many different modules within our devices and to work with leaders in the design of world class data converters. These devices integrate large high frequency (> 30 GHz) analog blocks along with complex digital blocks to create our custom System on Chip (SoC) solutions. Your tasks will cover the entire spectrum of mixed signal development starting from conceptual work, through the design, layout, and characterization of the devices. Responsibilities
Responsible to develop cutting edge SoCs for communication systems according to customer specifications, finding optimum tradeoffs between system performance, power dissipation and cost. Drive block specifications for design team Develop, run and maintain data converter system MATLAB and Verilog models for an SoC across various usage modes. Work with analog and digital implementation teams to ensure proper development of system designs. Ability to simulate entire signal path, in a mixed‒signal flow. Create and own chip level simulations that verify data converter operating modes are implemented correctly Collaboration
We work with other ASIC design groups based in Germany. You will work with a highly qualified team of ASIC engineers, located both locally and abroad.
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As part of this team, you will have an opportunity to architect and work on many different modules within our devices and to work with leaders in the design of world class data converters. These devices integrate large high frequency (> 30 GHz) analog blocks along with complex digital blocks to create our custom System on Chip (SoC) solutions. Your tasks will cover the entire spectrum of mixed signal development starting from conceptual work, through the design, layout, and characterization of the devices. Responsibilities
Responsible to develop cutting edge SoCs for communication systems according to customer specifications, finding optimum tradeoffs between system performance, power dissipation and cost. Drive block specifications for design team Develop, run and maintain data converter system MATLAB and Verilog models for an SoC across various usage modes. Work with analog and digital implementation teams to ensure proper development of system designs. Ability to simulate entire signal path, in a mixed‒signal flow. Create and own chip level simulations that verify data converter operating modes are implemented correctly Collaboration
We work with other ASIC design groups based in Germany. You will work with a highly qualified team of ASIC engineers, located both locally and abroad.
#J-18808-Ljbffr