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SQL Pager LLC

ASIC Design Engineer

SQL Pager LLC, San Jose, California, United States, 95199

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Responsibilities: IP and/or chip level micro-architectures, implementation, and validation Develop algorithmic computation engines, NAND memory controller, and so on Write up micro-architecture and design document and be able to present to customers Develop RTL, perform synthesis, lint and CDC check Working with customers to trouble shooting, debug, and tune system performance Requirements: M.S. Electrical Engineering or Computer Engineering with 5+ years of industry experience Proven experience of Verilog, System Verilog and C programming Knowledge of DSP algorithm including AES, Hash, ECC codec, data compression is a big plus Knowledge of Embedded Systems and processor architecture is a plus Demonstrated ability to resolve customer issues and deliver timely results Teamwork spirit and effective communication skills

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