MedStar Health
Principal Analog/Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS/SiGe
MedStar Health, Westlake Village, California, United States, 91361
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell's Broadband Analog group designs physical layer ICs for high-speed fiber optic data communication, such as Transimpedance Amplifiers (TIAs), and drivers for Silicon Photonic (SiPho) and discrete Electro-absorption Modulators (EAMs) and Mach-Zehnder Interferometer Modulators (MZMs). This group is the market leader in delivering TIAs and Drivers for Data Center and Telecom markets. We address the bandwidth, capacity and power issues faced by cloud computing and mega data center networks. Our world class group leverages our core competencies in advanced circuit design to solve the world's ever-increasing desire to transmit more data for less power with fewer errors. We are continually first to market in Data Center, Metro and Long-Haul applications.
As a member of the design group, the candidate will be responsible for design and validation of FET and BiCMOS circuits for high-speed broadband ICs that serve these applications.
What You Can Expect Marvell is seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz
Transimpedance amplifiers
TIAs. These optical interface chips are tightly coupled with our high-performance equalizers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems. In this role you will be responsible for: Active circuit design
as well as technical leadership . Design leading edge
transimpedance amplifier design , primarily in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) technology, where circuit performance will need to transcend beyond industry leading products. Develop transmission line structures
and other millimeter wave structures
to enable higher performance than would normally be achievable. Design of hi-performance broadband analog circuits for optical front-end
receivers . Design of various other analog circuitsincluding linear regulators, AGC loop, current/voltage sensors, bandgaps etc. Develop microarchitecture of major circuit blocks and guide team of designers to implement them.
Work with various technologies including SiGe BiCMOS and CMOS. Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support. What We're Looking For Bachelor's degree in Electrical Engineering
in the areas of design of high-performance
RF/
Analog Receiver/TIA design
and 10 - 15 years experienceOr
MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance
RF/
Analog Receiver/TIA design
. Proven experience in IC design including chip tape-out AND lab evaluation of
receiver
design working in the industry).
Solid experience in. Using EDA CAD tools
Performing Analog Custom Layout
Experience in measuring IC performance and debug of design to correlate simulations to measurements
Deep understanding of fundamentals, including: Detailed transistor level design
Device physics
Control/Feedback loop stability analysis
Direct project experience in at least one of the following areas is a plus: AGC loop design
High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
Experience in CTLE design
Experience in Package-System integration issues desired
Project experience in using different technologies. (SiGe BiCMOS is a plus)
A team-player
Experience in the following is a strong plus: Overseeing and mentoring junior circuit designers
Experience as chip lead with success in silicon
Experience in taking chips to mass production
Ability to translate chip level specifications into architecture
Strong communication, presentation and documentation skills.
#LI-TD1 Expected Base Pay Range (USD) 145,800 - 215,780, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at
TAOps@marvell.com. #LI-TD1 #J-18808-Ljbffr
What You Can Expect Marvell is seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz
Transimpedance amplifiers
TIAs. These optical interface chips are tightly coupled with our high-performance equalizers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems. In this role you will be responsible for: Active circuit design
as well as technical leadership . Design leading edge
transimpedance amplifier design , primarily in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) technology, where circuit performance will need to transcend beyond industry leading products. Develop transmission line structures
and other millimeter wave structures
to enable higher performance than would normally be achievable. Design of hi-performance broadband analog circuits for optical front-end
receivers . Design of various other analog circuitsincluding linear regulators, AGC loop, current/voltage sensors, bandgaps etc. Develop microarchitecture of major circuit blocks and guide team of designers to implement them.
Work with various technologies including SiGe BiCMOS and CMOS. Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support. What We're Looking For Bachelor's degree in Electrical Engineering
in the areas of design of high-performance
RF/
Analog Receiver/TIA design
and 10 - 15 years experienceOr
MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance
RF/
Analog Receiver/TIA design
. Proven experience in IC design including chip tape-out AND lab evaluation of
receiver
design working in the industry).
Solid experience in. Using EDA CAD tools
Performing Analog Custom Layout
Experience in measuring IC performance and debug of design to correlate simulations to measurements
Deep understanding of fundamentals, including: Detailed transistor level design
Device physics
Control/Feedback loop stability analysis
Direct project experience in at least one of the following areas is a plus: AGC loop design
High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
Experience in CTLE design
Experience in Package-System integration issues desired
Project experience in using different technologies. (SiGe BiCMOS is a plus)
A team-player
Experience in the following is a strong plus: Overseeing and mentoring junior circuit designers
Experience as chip lead with success in silicon
Experience in taking chips to mass production
Ability to translate chip level specifications into architecture
Strong communication, presentation and documentation skills.
#LI-TD1 Expected Base Pay Range (USD) 145,800 - 215,780, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at
TAOps@marvell.com. #LI-TD1 #J-18808-Ljbffr