The Rundown AI, Inc.
ABOUT THE ROLE
Do you have a passion for high-speed interfaces and enjoy digging deep into analog and mixed-signal behavior to ensure optimal system performance? We are looking for a Staff Optical SerDes Validation Engineer to join our silicon validation team. In this role, you’ll be responsible for validating and characterizing cutting-edge SerDes technologies used in advanced data communication systems.
This position blends deep technical expertise with hands-on lab work, cross-functional collaboration, and creative problem solving. You'll have the opportunity to influence the development of next-generation SerDes IPs and contribute to robust, high-performance solutions that power today’s connected world.
ESSENTIAL DUTIES AND RESPONSIBILITIES
Lead validation and electrical/optical characterization of high-speed SerDes IPs, including ethernet, PCIe and custom optical PHYs, using industry-standard lab instrumentation (oscilloscopes, BERTs, VNAs, spectrum analyzers, etc.)
Design, develop, and maintain both hardware and software test infrastructure for lab-based performance verification and compliance testing
Develop reference designs and test platforms to ensure consistent, repeatable evaluation of SerDes interfaces under real-world conditions
Define and execute validation plans aligned with internal specifications and industry standards (e.g., PCIe, Ethernet, CEI)
Collaborate closely with analog, digital, DSP, and system architecture teams to debug functional issues, improve performance, and validate feature implementations
Implement automated test flows and advanced data analysis tools using scripting languages (Python preferred) to improve efficiency and accuracy
Provide documentation and technical reports on test methodologies, validation results, and failure analysis
Support cross-functional teams such as production test, reliability, and applications engineering in addressing customer and manufacturing-related concerns
QUALIFICATIONS
Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 5+ years of relevant experience; Master’s or Ph.D. with 3+ years of experience preferred
Solid background in analog/mixed-signal circuit behavior and system-level validation practices
Extensive hands-on experience handling lab instruments such as oscilloscopes, BERTs, VNAs, spectrum analyzers, signal generators, and other high-speed measurement tools
Strong hands-on experience with high-speed signal testing and SerDes electrical compliance methods
Deep familiarity with PCIe, Ethernet, or other SerDes protocols and standards
Skilled in test automation and data visualization using Python, MATLAB, or equivalent scripting tools
Excellent troubleshooting skills across analog, digital, and mixed-signal domains
Strong verbal and written communication skills, including ability to produce clear technical documentation
Experience with signal and power integrity principles is a plus
Prior exposure to customer-facing debug support and demo environments is a bonus
LOCATION
: Santa Clara, CA For California Location: As an early stage start up, we offer an extremely attractive total compensation package inclusive of competitive base salary, bonus and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $185,000.00 - $225,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.
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: Santa Clara, CA For California Location: As an early stage start up, we offer an extremely attractive total compensation package inclusive of competitive base salary, bonus and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $185,000.00 - $225,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.
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