Apple Inc.
Cupertino, California, United States - Hardware
Description As a Power Flow Methodology Engineer, you’ll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. Your responsibilities include:
Architecting, implementing, and verifying new low-power design and verification flows.
Developing low-power methodologies across various future technologies.
Creating flows and tools related to power analysis, optimization, and verification for RTL construction/verification, synthesis, or P&R.
Collaborating with the design team to resolve issues and improve materials.
Minimum Qualifications
Bachelor's degree in a relevant field and at least 3 years of industry experience.
Preferred Qualifications
Understanding of VLSI and SoC design flows.
Passion for scripting and low-power domain-specific solutions.
Experience with flow development and object-oriented programming languages such as Python, C++, or Java.
Knowledge of modern software testing and development practices.
Strong communication skills.
Knowledge of Tcl, Perl, EDA tools, GUI development, UPF, and low-power design concepts is a plus.
Additional Information The base pay range for this role is $147,400 to $272,100, depending on skills, qualifications, experience, and location. Apple offers comprehensive benefits, stock programs, educational reimbursement, and other perks. This role may also be eligible for bonuses, commissions, or relocation assistance.
Apple is an equal opportunity employer committed to diversity and inclusion. We promote equal opportunity for all applicants regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.
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Description As a Power Flow Methodology Engineer, you’ll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. Your responsibilities include:
Architecting, implementing, and verifying new low-power design and verification flows.
Developing low-power methodologies across various future technologies.
Creating flows and tools related to power analysis, optimization, and verification for RTL construction/verification, synthesis, or P&R.
Collaborating with the design team to resolve issues and improve materials.
Minimum Qualifications
Bachelor's degree in a relevant field and at least 3 years of industry experience.
Preferred Qualifications
Understanding of VLSI and SoC design flows.
Passion for scripting and low-power domain-specific solutions.
Experience with flow development and object-oriented programming languages such as Python, C++, or Java.
Knowledge of modern software testing and development practices.
Strong communication skills.
Knowledge of Tcl, Perl, EDA tools, GUI development, UPF, and low-power design concepts is a plus.
Additional Information The base pay range for this role is $147,400 to $272,100, depending on skills, qualifications, experience, and location. Apple offers comprehensive benefits, stock programs, educational reimbursement, and other perks. This role may also be eligible for bonuses, commissions, or relocation assistance.
Apple is an equal opportunity employer committed to diversity and inclusion. We promote equal opportunity for all applicants regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.
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