University of Texas
Design Engineering Manager, Texas Institute for Electronics
University of Texas, Austin, Texas, us, 78716
Job Posting Title:
Design Engineering Manager, Texas Institute for Electronics Hiring Department:
Cockrell School of Engineering Position Open To:
All Applicants Weekly Scheduled Hours:
40 FLSA Status:
Exempt Earliest Start Date:
Immediately Position Duration:
Expected to Continue Location:
PICKLE RESEARCH CAMPUS About Us
The Texas Institute for Electronics (TIE) is a University of Texas at Austin-supported semiconductor consortium of state and local government, preeminent defense electronics and semiconductor companies, national labs and nationally recognized academic institutions. Our mission is to develop and execute a state-of-the-art 3D Heterogenous Integration manufacturing technology roadmap, and to provide critical pilot manufacturing capabilities to address national security needs and catalyze domestic economic growth. Join the Texas Institute for Electronics (TIE) and help us push the boundaries in critical semiconductor domains, including advanced packaging, with the aim of reestablishing U.S. prominence in semiconductor manufacturing. Purpose
The Design Engineering Manager will supervise a team of Design Engineers who will design and develop innovative semiconductor circuits and test structures to support TIE's facility manufacturing highly reliable and leading-edge 2.5D and 3D packaging solutions. This position will also manage and support multi-material (Silicon, III-V, Glass) and multi-domain (Analog/Digital, RF, Power, Thermal, Mechanical Stress, Signal Integrity) design, modeling, and production activities. Responsibilities
Supervise, guide, direct, and help train team of TIE Design Engineers through hands-on collaboration. Assist with hiring, performance reviews, and upper management communication on product status and roadmap alignment. Design and develop mixed signal circuits, test vehicles, test chips, and test structures for TIE's 3D-ADK (Assembly Design Kit). Develop workflows, 2.5D/3D modeling methods, and standard cells for multi-chiplet, heterogeneous micro-systems. Collaborate with Product and Test engineering teams to ensure performance, yield, reliability, and BIST methodologies. Work with EDA vendors to evaluate and improve tool offerings and capabilities. Develop and implement advanced models for semiconductor packaging effects. Improve automation of circuits and layouts using scripting languages. Participate in industry 'design standards' workshops and consortiums. Collaborate with internal and external design teams on package compatibility. Design and execute experiments for packaging performance optimization. Conduct multi-physics modeling and simulation studies. Stay current with industry trends and emerging technologies. Other related functions as assigned. Required Qualifications
Bachelor's degree in Electrical Engineering, Semiconductor Physics, Materials Science, or a related field. 10+ years of relevant industry experience in semiconductor IC design. Previous supervisory experience with small to medium-sized teams. Strong understanding of semiconductor device physics and mixed signal circuit design. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. Ability to manage multiple projects in a fast-paced environment. Proficiency in industry-standard EDA software for circuit and/or package design. Preferred Qualifications
Master's or higher degree in relevant semiconductor engineering fields. Experience with 2.5D and 3D semiconductor packaging technologies. Solid understanding of various packaging technologies (wire bonding, flip-chip, wafer-level packaging). Strong background in DFT/DFM methodologies and BIST techniques. Experience in multi-physics modeling (Power, Thermal, Mechanical, Signal Integrity, RF). Experience in a startup or R&D environment. Salary Range
$180,000 + depending on qualifications Working Conditions
On-site work in a scientific research environment and prototyping facility. Dynamic work conditions with multiple partners/customers. Occasional work outside standard office hours during peak periods. Repetitive use of a keyboard at a workstation. Use of manual dexterity (ex: using a mouse). Climbing of stairs. Required Materials
Resume/CV 3 work references with their contact information; at least one reference should be from a supervisor. Letter of interest. Important:
You will be prompted to submit your resume the first time you apply, then you will be provided an option to upload a new Resume for subsequent applications. Any additional Required Materials (letter of interest, references, etc.) will be uploaded in the Application Questions section; you will be able to multi-select additional files. Before submitting your online job application, ensure that ALL Required Materials have been uploaded. Once your job application has been submitted, you cannot make changes. Equal Opportunity Employer
The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.
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Design Engineering Manager, Texas Institute for Electronics Hiring Department:
Cockrell School of Engineering Position Open To:
All Applicants Weekly Scheduled Hours:
40 FLSA Status:
Exempt Earliest Start Date:
Immediately Position Duration:
Expected to Continue Location:
PICKLE RESEARCH CAMPUS About Us
The Texas Institute for Electronics (TIE) is a University of Texas at Austin-supported semiconductor consortium of state and local government, preeminent defense electronics and semiconductor companies, national labs and nationally recognized academic institutions. Our mission is to develop and execute a state-of-the-art 3D Heterogenous Integration manufacturing technology roadmap, and to provide critical pilot manufacturing capabilities to address national security needs and catalyze domestic economic growth. Join the Texas Institute for Electronics (TIE) and help us push the boundaries in critical semiconductor domains, including advanced packaging, with the aim of reestablishing U.S. prominence in semiconductor manufacturing. Purpose
The Design Engineering Manager will supervise a team of Design Engineers who will design and develop innovative semiconductor circuits and test structures to support TIE's facility manufacturing highly reliable and leading-edge 2.5D and 3D packaging solutions. This position will also manage and support multi-material (Silicon, III-V, Glass) and multi-domain (Analog/Digital, RF, Power, Thermal, Mechanical Stress, Signal Integrity) design, modeling, and production activities. Responsibilities
Supervise, guide, direct, and help train team of TIE Design Engineers through hands-on collaboration. Assist with hiring, performance reviews, and upper management communication on product status and roadmap alignment. Design and develop mixed signal circuits, test vehicles, test chips, and test structures for TIE's 3D-ADK (Assembly Design Kit). Develop workflows, 2.5D/3D modeling methods, and standard cells for multi-chiplet, heterogeneous micro-systems. Collaborate with Product and Test engineering teams to ensure performance, yield, reliability, and BIST methodologies. Work with EDA vendors to evaluate and improve tool offerings and capabilities. Develop and implement advanced models for semiconductor packaging effects. Improve automation of circuits and layouts using scripting languages. Participate in industry 'design standards' workshops and consortiums. Collaborate with internal and external design teams on package compatibility. Design and execute experiments for packaging performance optimization. Conduct multi-physics modeling and simulation studies. Stay current with industry trends and emerging technologies. Other related functions as assigned. Required Qualifications
Bachelor's degree in Electrical Engineering, Semiconductor Physics, Materials Science, or a related field. 10+ years of relevant industry experience in semiconductor IC design. Previous supervisory experience with small to medium-sized teams. Strong understanding of semiconductor device physics and mixed signal circuit design. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. Ability to manage multiple projects in a fast-paced environment. Proficiency in industry-standard EDA software for circuit and/or package design. Preferred Qualifications
Master's or higher degree in relevant semiconductor engineering fields. Experience with 2.5D and 3D semiconductor packaging technologies. Solid understanding of various packaging technologies (wire bonding, flip-chip, wafer-level packaging). Strong background in DFT/DFM methodologies and BIST techniques. Experience in multi-physics modeling (Power, Thermal, Mechanical, Signal Integrity, RF). Experience in a startup or R&D environment. Salary Range
$180,000 + depending on qualifications Working Conditions
On-site work in a scientific research environment and prototyping facility. Dynamic work conditions with multiple partners/customers. Occasional work outside standard office hours during peak periods. Repetitive use of a keyboard at a workstation. Use of manual dexterity (ex: using a mouse). Climbing of stairs. Required Materials
Resume/CV 3 work references with their contact information; at least one reference should be from a supervisor. Letter of interest. Important:
You will be prompted to submit your resume the first time you apply, then you will be provided an option to upload a new Resume for subsequent applications. Any additional Required Materials (letter of interest, references, etc.) will be uploaded in the Application Questions section; you will be able to multi-select additional files. Before submitting your online job application, ensure that ALL Required Materials have been uploaded. Once your job application has been submitted, you cannot make changes. Equal Opportunity Employer
The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.
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