Seneca Resources

Design Verification Engineer

Seneca Resources, Santa Clara

Save Job

3 days ago Be among the first 25 applicants

Direct message the job poster from Seneca Resources

Sr Technical Recruiter / Talent acquisition @ Seneca Resources

Contract

Seeking a Design Verification Engineer to drive functional verification of industry-leading IPs. You will collaborate with RTL, firmware, circuit, and architecture teams to deliver high-quality technologies.

Responsibilities:

Develop and maintain functional verification tests.
Create directed/random tests, debug failures, and resolve defects with RTL/FW engineers.
Perform functional and code coverage verification.
Provide technical support across teams.

Requirements:

10+ years ASIC design verification experience.
Proficiency in Verilog/SystemVerilog, UVM, and C/C++.
Experience with DDR/Memory Controller (PHY a plus).
Scripting (Python, Perl, TCL) experience preferred.
Knowledge of DFT methodologies a plus.
Excellent problem-solving and collaboration skills.

Seniority level

Seniority level
Associate

Employment type

Employment type
Contract

Job function

Job function
Information Technology
Industries
IT Services and IT Consulting

Referrals increase your chances of interviewing at Seneca Resources by 2x

Inferred from the description for this job

Medical insurance

Vision insurance

401(k)

Get notified about new Design Verification Engineer jobs in Santa Clara, CA .

San Jose, CA $150,000.00-$230,000.00 1 day ago

Santa Clara, CA $150,000.00-$260,000.00 5 days ago

Santa Clara, CA $150,000.00-$250,000.00 1 day ago

Cupertino, CA $129,800.00-$212,800.00 2 weeks ago

Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago

San Jose, CA $136,000.00-$204,000.00 2 days ago

Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago

San Jose, CA $160,000.00-$240,000.00 1 day ago

San Jose, CA $175,000.00-$225,000.00 1 day ago