Senior Staff Digital Verification Engineer

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Manage the digital verification environment for the design of projects. Set methodologies and guidelines for digital verification on the project. Review the internal/customer specifications and generate a full test plan and environment to confirm compliance. Review Register Transfer Level (RTL) to debug and understand any issues and propose solutions. Work closely with the design team to resolve RTL/Gatesim bugs. Create assertion based constrained random verification. Create Testcase plan, coverage plan, and verification plan. Add functional and code coverage. Part-time telecommuting allowed.
MINIMUM REQUIREMENTS:Bachelors degree or foreign equivalent in Electrical and Electronic Engineering, or a related field, and 60 months of experience.

Seniority level

• Seniority level

  Not Applicable

Employment type

• Employment type

  Part-time

Job function

• Job function

  Quality Assurance

• Industries

  Semiconductor Manufacturing

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