Rambus
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Principal Verification Engineer
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Rambus 1 week ago Be among the first 25 applicants Join to apply for the
Principal Verification Engineer
role at
Rambus Get AI-powered advice on this job and more exclusive features. Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptionalPrincipal Verification Engineerto join our Memory Interconnect Design team. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptionalPrincipal Verification Engineerto join our Memory Interconnect Design team. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
Are you a seasoned Verification Engineer ready to make a real impact?
Join Rambus in this high-visibility role where you’ll lead the charge in defining and executing Verification Strategies across multiple product lines and global sites. This is your chance to take full ownership, collaborate with top-tier design teams, and shape the future of cutting-edge technology!
Enjoy the best of both worlds with our hybrid role, working alongside top talent in cutting-edge facilities while enjoying the vibrant lifestyle each city offers!
Whether it’s the innovation and energy of Silicon Valley (San Jose, CA) or near the Santa Monica mountains in scenic Agoura Hills, CA.
You can also be in the thriving Tech Suburb in Johns Creek, GA just outside of Atlanta to the renowned Research Triangle Park in Morrisville, North Carolina.
Responsibilities
How You’ll Make a Difference
As our Technical Verification Lead, you’ll be at the heart of our chip development process—ensuring our designs are robust, reliable, and ready for the real world. Your leadership and technical expertise will directly shape the success of our silicon products.
Here’s How You’ll Contribute
Lead the charge on full-chip and block-level verification, ensuring our designs meet the highest standards. Collaborate closely with Architects, Logic, and Mixed-Signal Designers to define and execute robust verification plans. Build advanced test environments using UVM methodology, including testbenches, monitors, and scoreboards. Drive quality by achieving code coverage goals and delivering thoroughly verified silicon. Partner with Lab/System teams to develop test plans, support silicon bring-up, and debug real-world issues. Innovate within a dynamic R&D environment, contributing to the evolution of our verification flows and methodologies. Mentor and inspire junior engineers, helping to grow the next generation of technical talent.
Qualifications
What Makes You a Great Fit
MSEE & 10+ years or PhD EE & 7+ years’ experience of Verification Significant Experience with coding in System Verilog or Verilog and UVM methodology Significant Experience with standard ASIC Verification flow/software tools Simulation tools: Synopsys VCS, Cadence Xcelium Verification Methodologies: UVM (Universal Verification Methodology) Coverage & Analysis: Cadence IMC (Incisive Metrics Center) Strong knowledge of scripting, Linux/Unix environment Experience in leading and driving technical solutions across organization Good written & verbal communication skills A strong commitment & ability to work in cross functional and globally dispersed teams
What Makes You Shine
Verification of DDR memory interfaces Experience working in Analog/Mixed-Signal Products Verification Methodologies: SVA (System/Verilog Assertions) Regression Management: Jenkins (CI/CD Integration)
About Rambus
With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.
The US salary range for this full-time position is $129,300 to $240,100. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/ .
#hybrid
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Quality Assurance Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at Rambus by 2x Get notified about new Validation Engineer jobs in
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Principal Verification Engineer
role at
Rambus 1 week ago Be among the first 25 applicants Join to apply for the
Principal Verification Engineer
role at
Rambus Get AI-powered advice on this job and more exclusive features. Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptionalPrincipal Verification Engineerto join our Memory Interconnect Design team. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptionalPrincipal Verification Engineerto join our Memory Interconnect Design team. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
Are you a seasoned Verification Engineer ready to make a real impact?
Join Rambus in this high-visibility role where you’ll lead the charge in defining and executing Verification Strategies across multiple product lines and global sites. This is your chance to take full ownership, collaborate with top-tier design teams, and shape the future of cutting-edge technology!
Enjoy the best of both worlds with our hybrid role, working alongside top talent in cutting-edge facilities while enjoying the vibrant lifestyle each city offers!
Whether it’s the innovation and energy of Silicon Valley (San Jose, CA) or near the Santa Monica mountains in scenic Agoura Hills, CA.
You can also be in the thriving Tech Suburb in Johns Creek, GA just outside of Atlanta to the renowned Research Triangle Park in Morrisville, North Carolina.
Responsibilities
How You’ll Make a Difference
As our Technical Verification Lead, you’ll be at the heart of our chip development process—ensuring our designs are robust, reliable, and ready for the real world. Your leadership and technical expertise will directly shape the success of our silicon products.
Here’s How You’ll Contribute
Lead the charge on full-chip and block-level verification, ensuring our designs meet the highest standards. Collaborate closely with Architects, Logic, and Mixed-Signal Designers to define and execute robust verification plans. Build advanced test environments using UVM methodology, including testbenches, monitors, and scoreboards. Drive quality by achieving code coverage goals and delivering thoroughly verified silicon. Partner with Lab/System teams to develop test plans, support silicon bring-up, and debug real-world issues. Innovate within a dynamic R&D environment, contributing to the evolution of our verification flows and methodologies. Mentor and inspire junior engineers, helping to grow the next generation of technical talent.
Qualifications
What Makes You a Great Fit
MSEE & 10+ years or PhD EE & 7+ years’ experience of Verification Significant Experience with coding in System Verilog or Verilog and UVM methodology Significant Experience with standard ASIC Verification flow/software tools Simulation tools: Synopsys VCS, Cadence Xcelium Verification Methodologies: UVM (Universal Verification Methodology) Coverage & Analysis: Cadence IMC (Incisive Metrics Center) Strong knowledge of scripting, Linux/Unix environment Experience in leading and driving technical solutions across organization Good written & verbal communication skills A strong commitment & ability to work in cross functional and globally dispersed teams
What Makes You Shine
Verification of DDR memory interfaces Experience working in Analog/Mixed-Signal Products Verification Methodologies: SVA (System/Verilog Assertions) Regression Management: Jenkins (CI/CD Integration)
About Rambus
With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.
The US salary range for this full-time position is $129,300 to $240,100. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/ .
#hybrid
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Quality Assurance Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at Rambus by 2x Get notified about new Validation Engineer jobs in
San Jose, CA . Santa Clara, CA $132,000.00-$178,000.00 5 days ago San Jose, CA $100,000.00-$130,000.00 2 weeks ago Mountain View, CA $196,000.00-$248,000.00 2 weeks ago San Jose, CA $141,280.00-$211,920.00 7 hours ago Fremont, CA $89,579.00-$134,369.00 1 week ago San Jose, CA $110,000.00-$135,000.00 2 weeks ago San Jose, CA $159,800.00-$202,300.00 2 weeks ago Verification and Validation Engineer/Senior V&V Engineer
Santa Clara, CA $120,000.00-$150,000.00 2 months ago Fremont, CA $90,000.00-$100,000.00 1 month ago Verification and Validation Engineer/Senior V&V Engineer
Customer Quality Engineer - Automotive and Tegra
Fremont, CA $100,000.00-$115,000.00 1 day ago Test and Validation Engineer II, Drive Unit Test and Validation
Verification and Validation Engineer/Senior V&V Engineer
Fremont, CA $120,000.00-$150,000.00 1 week ago Verification and Validation Engineer/Senior V&V Engineer
San Mateo County, CA $120,000.00-$150,000.00 3 weeks ago San Jose, CA $160,000.00-$210,000.00 6 days ago Staff Supplier Quality Engineer - Mechanical (Remote or Hybrid)
Verification and Validation Engineer/Senior V&V Engineer
Fremont, CA $120,000.00-$150,000.00 3 weeks ago Fremont, CA $75,000.00-$95,000.00 2 weeks ago Palo Alto, CA $93,900.00-$140,800.00 7 hours ago San Jose, CA $130,000.00-$154,000.00 2 weeks ago Quality Assurance Engineer I, Amazon Smart Vehicles, Amazon Smart Vehicles, Validation & Verification team
Sunnyvale, CA $75,700.00-$183,100.00 11 hours ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr