AMD
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AMD provided pay range This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range $159,840.00/yr - $239,760.00/yr
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
The Role Building full-chip RTL connectivity models. Integrating RTL components from multiple design teams. Verifying that full chip models match architectural intent. Developing custom tools and methodologies to improve development efficiency and quality.
The Person We are looking for a RTL digital design engineer to join the FPGA Architecture Development group. The right candidate will focus on full-chip RTL development and integration for next generation FPGA and programmable SoC products. The candidate must be able to work with team members in globally diverse regions. A positive attitude and strong personal desire to "make a difference". A self-starter who demonstrates an ability to work on own as well within a team.
Key Responsibilities
Develop Full Chip SOC RTL
Write Full Chip Design Specification document
Work with IP development team to integrate IPs
Work across architecture, SW and verification teams to assure Full Chip SOC RTL quality
Run lint and cdc tools and generate timing constraints
Preferred Experience
Strong experience using FPGAs and understanding FPGA architectures in a semiconductor environment
Proven experience with stages in the ASIC design flow including verification methodologies and tools (UVM/OVM, Formal Checks, Lint tools, etc.)
Knowledge in RTL and behavioral coding, preferably with Verilog and SystemVerilog
Good waveform debug skills using front end industry standard design tools like VCS, NC Sim, or Verdi
Knowledge of Unix/Linux environment and scripting languages such as Perl or Python
Some Experience using Revision Control tools - CVS, Subversion, or Perforce
Presentation Skills
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering
Location San Jose, CA
AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Engineering, Information Technology, and Design
Industries
Semiconductor Manufacturing
Referrals increase your chances of interviewing at AMD by 2x
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AMD provided pay range This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range $159,840.00/yr - $239,760.00/yr
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
The Role Building full-chip RTL connectivity models. Integrating RTL components from multiple design teams. Verifying that full chip models match architectural intent. Developing custom tools and methodologies to improve development efficiency and quality.
The Person We are looking for a RTL digital design engineer to join the FPGA Architecture Development group. The right candidate will focus on full-chip RTL development and integration for next generation FPGA and programmable SoC products. The candidate must be able to work with team members in globally diverse regions. A positive attitude and strong personal desire to "make a difference". A self-starter who demonstrates an ability to work on own as well within a team.
Key Responsibilities
Develop Full Chip SOC RTL
Write Full Chip Design Specification document
Work with IP development team to integrate IPs
Work across architecture, SW and verification teams to assure Full Chip SOC RTL quality
Run lint and cdc tools and generate timing constraints
Preferred Experience
Strong experience using FPGAs and understanding FPGA architectures in a semiconductor environment
Proven experience with stages in the ASIC design flow including verification methodologies and tools (UVM/OVM, Formal Checks, Lint tools, etc.)
Knowledge in RTL and behavioral coding, preferably with Verilog and SystemVerilog
Good waveform debug skills using front end industry standard design tools like VCS, NC Sim, or Verdi
Knowledge of Unix/Linux environment and scripting languages such as Perl or Python
Some Experience using Revision Control tools - CVS, Subversion, or Perforce
Presentation Skills
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering
Location San Jose, CA
AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Engineering, Information Technology, and Design
Industries
Semiconductor Manufacturing
Referrals increase your chances of interviewing at AMD by 2x
Get notified about new Design Engineer jobs in
San Jose, CA .
Sunnyvale, CA $111,000 - $164,000 5 days ago
Sunnyvale, CA $170,000 - $240,000 5 days ago
Santa Clara, CA $140,000 - $190,000 1 month ago
Sunnyvale, CA $139,000 - $200,000 1 week ago
Sunnyvale, CA $80,500 - $131,813 2 weeks ago
Santa Clara, CA $63,000 - $142,000 4 months ago
San Francisco Bay Area $120,000 - $150,000 3 weeks ago
Fremont, CA $130,000 - $200,000 1 month ago
Santa Clara, CA $100,000 - $180,000 6 days ago
San Francisco Bay Area $90,000 - $180,000 3 weeks ago
San Jose, CA $144,000 - $180,000 4 days ago
We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr