Meta
ASIC Implementation Engineer - Static Verification
Meta, Sunnyvale, California, United States, 94087
Overview
ASIC Implementation Engineer - Static Verification role at Meta within the Infrastructure organization. Base pay range: $142,000.00/yr - $203,000.00/yr. Actual pay will be based on skills and experience; discuss with your recruiter to learn more. Responsibilities
Perform Flat and Hierarchical Clock Domain Crossing (CDC) analysis with designers to analyze complex clock domain crossings and sign off on the CDC. Perform Flat and Hierarchical Reset Domain Crossing checks. Understand the Reset-Architecture by working with Design and Firmware teams and develop reset groups and the corresponding reset sequence for RDC. Perform RTL Lint and collaborate with Designers to create waivers. Perform RTL Design for Testability Analysis and improve the Design for Testability coverage for Stuck-at faults. Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlists for Timing, Area, and Power. Develop automation scripts and methodology for Front-end tools including Lint, CDC, and RDC. Work closely with Design Engineers, DV Engineers, Emulation Engineers, and interact with Physical Design Engineers to provide timing/congestion feedback during handoff tasks. Minimum Qualifications
Bachelor's degree in Computer Science, Computer Engineering, or relevant technical field, or equivalent practical experience. 6+ years of experience with static verification tools. Experience with Lint, Clock Domain Crossing (CDC), and Reset Domain Crossing. Experience with SOC CDC signoff and SOC integration (Clocking, Reset, PLL, etc.). Experience with RTL design using SystemVerilog or other Hardware Description Language. Experience with communicating across functional internal teams and vendors. Preferred Qualifications
Scripting and programming experience using Perl/Python, TCL, and Make. Experience with SOC Design Integration and Front-End Implementation. Knowledge of timing/physical libraries and SRAM memories. Experience with Netlist CDC Analysis and improving Mean Time Between Failures. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools. Experience developing structural rule-based checks for RTL and Netlist. About Meta
Meta builds technologies that help people connect, find communities, and grow businesses. Meta is committed to equal employment opportunity and affirmative action. We do not discriminate based on protected characteristics and may leverage AI/ML in applications for employment. Meta participates in the E-Verify program where required. Reasonable accommodations are provided for candidates with disabilities. Equity and Benefits
Base compensation: $142,000/year to $203,000/year, plus bonus, equity, and benefits. Individual compensation is determined by skills, qualifications, experience, and location. This posting reflects base salary; additional incentives may apply. Learn more about benefits at Meta. Employment details
Seniority level: Not Applicable Employment type: Full-time Job function: Information Technology Industries: Technology, Information and Internet Referral programs may increase interview chances. Location: Sunnyvale, CA; other nearby Bay Area locations may be listed as applicable.
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ASIC Implementation Engineer - Static Verification role at Meta within the Infrastructure organization. Base pay range: $142,000.00/yr - $203,000.00/yr. Actual pay will be based on skills and experience; discuss with your recruiter to learn more. Responsibilities
Perform Flat and Hierarchical Clock Domain Crossing (CDC) analysis with designers to analyze complex clock domain crossings and sign off on the CDC. Perform Flat and Hierarchical Reset Domain Crossing checks. Understand the Reset-Architecture by working with Design and Firmware teams and develop reset groups and the corresponding reset sequence for RDC. Perform RTL Lint and collaborate with Designers to create waivers. Perform RTL Design for Testability Analysis and improve the Design for Testability coverage for Stuck-at faults. Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlists for Timing, Area, and Power. Develop automation scripts and methodology for Front-end tools including Lint, CDC, and RDC. Work closely with Design Engineers, DV Engineers, Emulation Engineers, and interact with Physical Design Engineers to provide timing/congestion feedback during handoff tasks. Minimum Qualifications
Bachelor's degree in Computer Science, Computer Engineering, or relevant technical field, or equivalent practical experience. 6+ years of experience with static verification tools. Experience with Lint, Clock Domain Crossing (CDC), and Reset Domain Crossing. Experience with SOC CDC signoff and SOC integration (Clocking, Reset, PLL, etc.). Experience with RTL design using SystemVerilog or other Hardware Description Language. Experience with communicating across functional internal teams and vendors. Preferred Qualifications
Scripting and programming experience using Perl/Python, TCL, and Make. Experience with SOC Design Integration and Front-End Implementation. Knowledge of timing/physical libraries and SRAM memories. Experience with Netlist CDC Analysis and improving Mean Time Between Failures. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools. Experience developing structural rule-based checks for RTL and Netlist. About Meta
Meta builds technologies that help people connect, find communities, and grow businesses. Meta is committed to equal employment opportunity and affirmative action. We do not discriminate based on protected characteristics and may leverage AI/ML in applications for employment. Meta participates in the E-Verify program where required. Reasonable accommodations are provided for candidates with disabilities. Equity and Benefits
Base compensation: $142,000/year to $203,000/year, plus bonus, equity, and benefits. Individual compensation is determined by skills, qualifications, experience, and location. This posting reflects base salary; additional incentives may apply. Learn more about benefits at Meta. Employment details
Seniority level: Not Applicable Employment type: Full-time Job function: Information Technology Industries: Technology, Information and Internet Referral programs may increase interview chances. Location: Sunnyvale, CA; other nearby Bay Area locations may be listed as applicable.
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