Vermont Staffing
Senior Device Engineer, Protection Circuits, ESD and Latch-up
Vermont Staffing, Essex Junction, Vermont, us, 05453
ESD/LU Technology Enablement Engineer
GlobalFoundries is seeking an experienced ESD/LU technology enablement engineer to work on our advanced technology nodes delivering ESD/LU protection designs/solutions and enablement. The ideal candidate will have strong technical skills and excellent teamwork. The position will require strong interaction with many teams inside of GlobalFoundries to enable ESD/LU technology milestones and customer solutions. Essential Responsibilities: Develop ESD and Latch up protection device/circuit solutions for GlobalFoundries differentiated technology portfolio Design test macros for electrical characterization and JEDEC qualification. Define test plans. Execute qualification plans per industry standards. Analyze electrical test data using languages such as Python and R Develop ESD/ Latch-up-related physical ground rules Develop supporting documentation, such as user guides and application notes Submit and track failure analysis samples to understand observed failure and defect modes Ensure correct process monitors are in place for robust ESD/Latch-up manufacturing Collaborate closely with Quality, Reliability, and Technology teams for technology qualification Work with circuit IO Design Teams to co-optimize I/O and ESD performance Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications: BS or MS in Solid State Physics, Electrical Engineering, or other relevant engineering discipline Working knowledge and experience with semiconductor process fabrication flow, nanofabrication, solid state and semiconductor device physics and design of experiments (DOE) methodology. Familiarity with semiconductor physical design including electrical test structure design. Practical experience using Electronic Design Automation [EDA] tools such as Cadence Virtuoso and Mentor Calibre Strong data analysis, data mining and problem-solving skills. Strong interpersonal skills; team player; able to work effectively in a dynamic, fast-paced environment. Travel - Up to 10% Expected Salary Range $65,400.00 - $145,800.00. The exact Salary will be determined based on qualifications, experience and location.
GlobalFoundries is seeking an experienced ESD/LU technology enablement engineer to work on our advanced technology nodes delivering ESD/LU protection designs/solutions and enablement. The ideal candidate will have strong technical skills and excellent teamwork. The position will require strong interaction with many teams inside of GlobalFoundries to enable ESD/LU technology milestones and customer solutions. Essential Responsibilities: Develop ESD and Latch up protection device/circuit solutions for GlobalFoundries differentiated technology portfolio Design test macros for electrical characterization and JEDEC qualification. Define test plans. Execute qualification plans per industry standards. Analyze electrical test data using languages such as Python and R Develop ESD/ Latch-up-related physical ground rules Develop supporting documentation, such as user guides and application notes Submit and track failure analysis samples to understand observed failure and defect modes Ensure correct process monitors are in place for robust ESD/Latch-up manufacturing Collaborate closely with Quality, Reliability, and Technology teams for technology qualification Work with circuit IO Design Teams to co-optimize I/O and ESD performance Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications: BS or MS in Solid State Physics, Electrical Engineering, or other relevant engineering discipline Working knowledge and experience with semiconductor process fabrication flow, nanofabrication, solid state and semiconductor device physics and design of experiments (DOE) methodology. Familiarity with semiconductor physical design including electrical test structure design. Practical experience using Electronic Design Automation [EDA] tools such as Cadence Virtuoso and Mentor Calibre Strong data analysis, data mining and problem-solving skills. Strong interpersonal skills; team player; able to work effectively in a dynamic, fast-paced environment. Travel - Up to 10% Expected Salary Range $65,400.00 - $145,800.00. The exact Salary will be determined based on qualifications, experience and location.