Silicon Design Verification Engineer

Job DescriptionJob Descriptionn

Location: Hybrid – Santa Clara, CA or Austin, TX
Type: Full-Time | Salary: $150K–$250K + Competitive Equity
Visa Sponsorship: H-1B, O-1, OPT Available

About the Opportunityn

Initio Capital is hiring a Design Verification Engineer on behalf of one of the most ambitious chip startups in the U.S.—a stealth-mode team redefining the future of AI and analytics acceleration .

Backed by top-tier investors and built around a seasoned team from Apple, Intel, and Nvidia, this company is designing RISC-V–based silicon with tightly integrated AI acceleration and custom workloads in mind. This is an opportunity to work on deeply complex verification challenges that impact compute performance, efficiency, and reliability at the foundational layer of modern infrastructure.

About the Rolen

As a Silicon Verification Engineer , you'll take ownership of top-level verification for the company’s AI/analytics accelerator. You'll define and implement verification strategies, write test plans, build emulation-friendly testbenches, and partner with software and silicon teams to enable end-to-end validation. This role offers the chance to shape product and verification flow in a high-autonomy environment.

What You’ll Don

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  Develop verification strategy and own DV execution for complex accelerator subsystems

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  Write and maintain testbenches in SystemVerilog, C++, and Python

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  Create coverage-driven and directed/random tests for full-chip and subsystem validation

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  Collaborate with software, firmware, and architecture teams for co-simulation

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  Build infrastructure for emulation, simulation, and hardware bring-up

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  Deliver high-quality silicon verification aligned with aggressive execution timelines

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✅ What We’re Looking Forn

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  5+ years of hands-on design verification (DV) experience

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  MS or PhD in Electrical Engineering, Computer Engineering, or related field

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  Strong SystemVerilog, C++, and/or Python development skills

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  Deep understanding of computer architecture, SoC design, and memory/cache subsystems

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  Proven experience verifying CPUs, GPUs, or custom accelerators

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  Familiarity with industry-standard DV methodologies (UVM, formal, coverage-driven, etc.)

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Bonus Pointsn

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  Experience enabling HW/SW co-simulation or working on firmware test coverage

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  Past contributions to hardware/software co-design workflows

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  Previous experience at early-stage silicon or systems startups

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  Passion for AI/ML workloads, compute acceleration, or chip performance optimization

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Compensation & Perksn

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  Salary: $150K – $250K

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  Equity: Meaningful early-stage grant

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  Hybrid in Santa Clara, CA or Austin, TX

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  H-1B, O-1, OPT sponsorship available

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  Collaborate with industry leaders from the most respected names in semiconductors

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  Work on a moonshot AI-silicon vision with deep technical impact and upside

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This is the rare chance to define the performance boundaries of next- AI chips from the ground up.

Apply now to be considered for this high-impact role.