Google Inc.
Hardware Architecture Modeling Engineer, Google Cloud
Google Inc., Sunnyvale, California, United States, 94087
Overview
Hardware Architecture Modeling Engineer, Google Cloud – Mid level role located in Sunnyvale, CA. Drive progress, solve problems, and mentor more junior team members; apply deeper expertise within the relevant area. Responsibilities
Lead Machine Learning workload characterization, benchmarking, and hardware-software co-design. Conduct performance and power analyses and quantitatively evaluate proposals. Develop architectural and micro architectural models to enable quantitative analysis. Collaborate with partners in hardware design, software, compiler, ML model and research teams for hardware/software co-design. Propose capabilities and next-generation TPUs and chip roadmap, and contribute to TPU chip specs. Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 3 years of experience in computer architecture performance analysis, or a PhD degree in lieu of industry experience. Experience in developing software systems in C++ or Python. Preferred qualifications
Experience in applying computer architecture principles to solve open-ended problems. Experience in analyzing workload performance and creating benchmarks. Experience in hardware and software co-design. Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog. Knowledge of processor design or accelerator designs and mapping Machine Learning models to hardware architectures. About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Machine Learning (ML) Hardware Architecture Modeling and Co-design Engineer, you will work with hardware and software architects to model, analyze, and define next-generation TPUs. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. Compensation
The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Salary ranges are determined by role, level, and location. Individual pay within the range is determined by location and factors including job-related skills, experience, and education or training. Recruiter can share specific salary range for preferred location during hiring. Compensation details reflect base salary and do not include bonus, equity, or benefits. Responsibilities (continued)
Lead Machine Learning workload characterization, benchmarking, and hardware-software co-design. Conduct performance and power analyses and quantitatively evaluate proposals. Develop architectural and micro architectural models to enable quantitative analysis. Collaborate with partners in hardware design, software, compiler, ML model and research teams for hardware/software co-design. Propose capabilities and next-generation TPUs and chip roadmap, and contribute to TPU chip specs. EEO and notice
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, or other legally protected status. See also Google’s EEO Policy and related statements. Google is a global company and, to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
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Hardware Architecture Modeling Engineer, Google Cloud – Mid level role located in Sunnyvale, CA. Drive progress, solve problems, and mentor more junior team members; apply deeper expertise within the relevant area. Responsibilities
Lead Machine Learning workload characterization, benchmarking, and hardware-software co-design. Conduct performance and power analyses and quantitatively evaluate proposals. Develop architectural and micro architectural models to enable quantitative analysis. Collaborate with partners in hardware design, software, compiler, ML model and research teams for hardware/software co-design. Propose capabilities and next-generation TPUs and chip roadmap, and contribute to TPU chip specs. Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 3 years of experience in computer architecture performance analysis, or a PhD degree in lieu of industry experience. Experience in developing software systems in C++ or Python. Preferred qualifications
Experience in applying computer architecture principles to solve open-ended problems. Experience in analyzing workload performance and creating benchmarks. Experience in hardware and software co-design. Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog. Knowledge of processor design or accelerator designs and mapping Machine Learning models to hardware architectures. About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Machine Learning (ML) Hardware Architecture Modeling and Co-design Engineer, you will work with hardware and software architects to model, analyze, and define next-generation TPUs. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. Compensation
The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Salary ranges are determined by role, level, and location. Individual pay within the range is determined by location and factors including job-related skills, experience, and education or training. Recruiter can share specific salary range for preferred location during hiring. Compensation details reflect base salary and do not include bonus, equity, or benefits. Responsibilities (continued)
Lead Machine Learning workload characterization, benchmarking, and hardware-software co-design. Conduct performance and power analyses and quantitatively evaluate proposals. Develop architectural and micro architectural models to enable quantitative analysis. Collaborate with partners in hardware design, software, compiler, ML model and research teams for hardware/software co-design. Propose capabilities and next-generation TPUs and chip roadmap, and contribute to TPU chip specs. EEO and notice
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, or other legally protected status. See also Google’s EEO Policy and related statements. Google is a global company and, to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
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