Apple Inc.
Memory Performance Architect, Platform Architecture
Apple Inc., Cupertino, California, United States, 95014
Overview
Memory Performance Architect, Platform Architecture — Cupertino, California, United States Hardware In this role, you will be a member of a System-on-Chip (SoC) architecture team, working with hardware and software engineering groups to shape the architecture of Apple’s future devices. The role focuses on architecture definition, exploration and modeling of the memory subsystem and studying the performance/power trade-offs of new DRAM technologies, as well as tuning efficiency for different products such as Watch, iPhone, Mac, or Vision Pro. We are looking for SoC architects with a passion to develop and document new ideas and model them in C++ to demonstrate their value and impact.
Description
You will have responsibilities for developing the SoC level solutions that drive the architecture of Apple’s future System-on-Chips. Your work will be highly visible and critical to delivering the best performance and power efficiency in Apple’s future products. You will be expected to collaborate with all the hardware and software teams that are part of Apple’s SoC development:
C++ performance modeling of proposed architectural solutions and features.
Writing architectural specification documents in collaboration with engineers across different disciplines.
Gathering, analyzing, and validating measured and simulated results to compare architectural design alternatives.
Working with multi-functional teams to develop architectural solutions.
Improving Apple’s modeling platform by developing APIs, tools, and representative examples used throughout the company.
Carefully analyzing and presenting results to enable data-driven architecture/design decisions.
Measuring and analyzing existing SOC workloads and performance.
Some international travel is required for this position.
Minimum Qualifications
Knowledge of memory controller techniques for different memory technologies such as DDRx and LPDDRx Understanding of memory access patterns and usage of system caches for CPU, GPU, Camera/Video, or Machine Learning hardware accelerators
Preferred Qualifications
MS or PhD in CS, EE, or related field 20+ years of relevant experience Knowledge of QoS solutions for SoCs Ability to conduct performance architecture and microarchitecture modeling and studies Experience contributing to a SoC design project at the micro-architectural or RTL level Expertise in cooperative code development using a revision control system such as GIT
Compensation and Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $212,000 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including comprehensive medical and dental coverage, retirement benefits, discounted products and free services, and reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
#J-18808-Ljbffr
Memory Performance Architect, Platform Architecture — Cupertino, California, United States Hardware In this role, you will be a member of a System-on-Chip (SoC) architecture team, working with hardware and software engineering groups to shape the architecture of Apple’s future devices. The role focuses on architecture definition, exploration and modeling of the memory subsystem and studying the performance/power trade-offs of new DRAM technologies, as well as tuning efficiency for different products such as Watch, iPhone, Mac, or Vision Pro. We are looking for SoC architects with a passion to develop and document new ideas and model them in C++ to demonstrate their value and impact.
Description
You will have responsibilities for developing the SoC level solutions that drive the architecture of Apple’s future System-on-Chips. Your work will be highly visible and critical to delivering the best performance and power efficiency in Apple’s future products. You will be expected to collaborate with all the hardware and software teams that are part of Apple’s SoC development:
C++ performance modeling of proposed architectural solutions and features.
Writing architectural specification documents in collaboration with engineers across different disciplines.
Gathering, analyzing, and validating measured and simulated results to compare architectural design alternatives.
Working with multi-functional teams to develop architectural solutions.
Improving Apple’s modeling platform by developing APIs, tools, and representative examples used throughout the company.
Carefully analyzing and presenting results to enable data-driven architecture/design decisions.
Measuring and analyzing existing SOC workloads and performance.
Some international travel is required for this position.
Minimum Qualifications
Knowledge of memory controller techniques for different memory technologies such as DDRx and LPDDRx Understanding of memory access patterns and usage of system caches for CPU, GPU, Camera/Video, or Machine Learning hardware accelerators
Preferred Qualifications
MS or PhD in CS, EE, or related field 20+ years of relevant experience Knowledge of QoS solutions for SoCs Ability to conduct performance architecture and microarchitecture modeling and studies Experience contributing to a SoC design project at the micro-architectural or RTL level Expertise in cooperative code development using a revision control system such as GIT
Compensation and Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $212,000 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including comprehensive medical and dental coverage, retirement benefits, discounted products and free services, and reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
#J-18808-Ljbffr