Eastridge Workforce Solutions
Physical Design Engineer (SoC) (272566)
Eastridge Workforce Solutions, San Jose, California, United States, 95123
Overview Eastridge Workforce Solutions is seeking an experienced
Physical Design Engineer
to support one of our key clients in the electronic component manufacturing industry. This opportunity is ideal for an engineer with deep expertise in physical design and sign-off at advanced process nodes. You will play a critical role in delivering high-performance mobile application processors from netlist to GDSII.
Find out more about the daily tasks, overall responsibilities, and required experience for this opportunity by scrolling down now. Key Responsibilities
Lead the implementation flow from RTL netlist through GDSII tapeout Perform floorplanning, power planning, place-and-route (P&R), and clock tree synthesis (CTS) Drive timing closure and optimize for performance, power, and area Run physical verification (LVS/DRC) using Calibre and extract parasitics with StarRC Implement and validate timing/functional ECOs Apply low-power design techniques (UPF/CPF methodologies) Develop and maintain TCL scripts and automation to streamline flows Troubleshoot tool or flow-related issues and deploy workarounds Coordinate with RTL, STA, and verification teams to meet tapeout schedules Qualifications
Bachelor's degree in Electrical or Computer Engineering (or related field) Minimum 5 years of recent experience in physical design at advanced nodes (28nm and below) Strong proficiency in Synopsys ICC2 and place-and-route flows Solid background in physical verification and parasitic extraction Proven experience driving full-chip or block-level tapeouts Expertise in timing closure and ECO implementation Hands-on knowledge of low-power implementation techniques Proficiency in scripting (TCL) and flow automation Strong analytical and debugging skills Preferred Traits
Collaborative team player with strong communication skills Able to work independently and drive tasks to completion Comfortable working in fast-paced and technically complex environments Eager to learn new tools, methodologies, and node-specific challenges Benefits Benefits: Use this link bit.ly/4cGUQSh to learn more about benefits available to Eastridge’s temporary employees. From time to time Eastridge’s clients may offer additional benefits to Eastridge employees while on assignment. Information about those benefits will be communicated when applicable. Eastridge Workforce Solutions is an equal opportunity employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws. We celebrate diversity and are committed to creating an inclusive environment for all employees. Please note that Eastridge is unable to provide visa sponsorship to applicants. Certain clients require Eastridge to perform background checks and Eastridge will consider qualified applicants with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
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Physical Design Engineer
to support one of our key clients in the electronic component manufacturing industry. This opportunity is ideal for an engineer with deep expertise in physical design and sign-off at advanced process nodes. You will play a critical role in delivering high-performance mobile application processors from netlist to GDSII.
Find out more about the daily tasks, overall responsibilities, and required experience for this opportunity by scrolling down now. Key Responsibilities
Lead the implementation flow from RTL netlist through GDSII tapeout Perform floorplanning, power planning, place-and-route (P&R), and clock tree synthesis (CTS) Drive timing closure and optimize for performance, power, and area Run physical verification (LVS/DRC) using Calibre and extract parasitics with StarRC Implement and validate timing/functional ECOs Apply low-power design techniques (UPF/CPF methodologies) Develop and maintain TCL scripts and automation to streamline flows Troubleshoot tool or flow-related issues and deploy workarounds Coordinate with RTL, STA, and verification teams to meet tapeout schedules Qualifications
Bachelor's degree in Electrical or Computer Engineering (or related field) Minimum 5 years of recent experience in physical design at advanced nodes (28nm and below) Strong proficiency in Synopsys ICC2 and place-and-route flows Solid background in physical verification and parasitic extraction Proven experience driving full-chip or block-level tapeouts Expertise in timing closure and ECO implementation Hands-on knowledge of low-power implementation techniques Proficiency in scripting (TCL) and flow automation Strong analytical and debugging skills Preferred Traits
Collaborative team player with strong communication skills Able to work independently and drive tasks to completion Comfortable working in fast-paced and technically complex environments Eager to learn new tools, methodologies, and node-specific challenges Benefits Benefits: Use this link bit.ly/4cGUQSh to learn more about benefits available to Eastridge’s temporary employees. From time to time Eastridge’s clients may offer additional benefits to Eastridge employees while on assignment. Information about those benefits will be communicated when applicable. Eastridge Workforce Solutions is an equal opportunity employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws. We celebrate diversity and are committed to creating an inclusive environment for all employees. Please note that Eastridge is unable to provide visa sponsorship to applicants. Certain clients require Eastridge to perform background checks and Eastridge will consider qualified applicants with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
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