Apple
Overview
Wireless SoC Design Engineer San Diego, California, United States Hardware Summary
Role within Apple’s wireless silicon development team. The wireless SOC organization is responsible for all aspects of wireless silicon development, with emphasis on energy-efficient design and new technologies that transform the user experience. Collaboration spans RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. A fast-paced and challenging environment with cross-functional collaboration is encouraged to apply. Description
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. Engage in hardware/software partitioning discussions with software and firmware teams. Collaborate with physical design, design for testability (DFT), power management, and CAD teams to finalize and deliver fully functional IP for SoC integration. Provide support to verification, prototyping, and emulation teams during pre-silicon verification phases, as well as software/firmware development. Assist in post-silicon validation, system integration, and debugging efforts, and address any necessary silicon design revisions promptly. Minimum Qualifications
BS and 10+ years of relevant industry experience. Preferred Qualifications
Proficient in digital design fundamentals, with a strong foundation. Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs. Knowledgeable about the ASIC design flow, including System Verilog RTL implementation, Lint, Synthesis, STA, and LEC. Expertise in design domains such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIe, QSPI, UART, and SPMI is a plus. Thorough understanding of cross clock-domain design principles and CDC requirements. Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis, is a plus. Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques. Strong communication skills, both written and oral. Pay & Benefits
At Apple, base pay is one part of the total compensation package and ranges between $171,600 and $302,200, depending on skills, qualifications, experience, and location. Eligible for discretionary employee stock programs, including restricted stock units and Employee Stock Purchase Plan eligibility. Benefits include comprehensive medical and dental coverage, retirement benefits, discounted products and services, and education-related reimbursement. This role may be eligible for discretionary bonuses or relocation benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. EEO and Compliance
Apple is an equal opportunity employer committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple participates in the E-Verify program in certain locations as required by law. Apple is committed to providing reasonable accommodation to applicants with physical and mental disabilities. Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment. An employer who violates this law may face penalties and civil liability.
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Wireless SoC Design Engineer San Diego, California, United States Hardware Summary
Role within Apple’s wireless silicon development team. The wireless SOC organization is responsible for all aspects of wireless silicon development, with emphasis on energy-efficient design and new technologies that transform the user experience. Collaboration spans RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. A fast-paced and challenging environment with cross-functional collaboration is encouraged to apply. Description
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. Engage in hardware/software partitioning discussions with software and firmware teams. Collaborate with physical design, design for testability (DFT), power management, and CAD teams to finalize and deliver fully functional IP for SoC integration. Provide support to verification, prototyping, and emulation teams during pre-silicon verification phases, as well as software/firmware development. Assist in post-silicon validation, system integration, and debugging efforts, and address any necessary silicon design revisions promptly. Minimum Qualifications
BS and 10+ years of relevant industry experience. Preferred Qualifications
Proficient in digital design fundamentals, with a strong foundation. Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs. Knowledgeable about the ASIC design flow, including System Verilog RTL implementation, Lint, Synthesis, STA, and LEC. Expertise in design domains such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIe, QSPI, UART, and SPMI is a plus. Thorough understanding of cross clock-domain design principles and CDC requirements. Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis, is a plus. Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques. Strong communication skills, both written and oral. Pay & Benefits
At Apple, base pay is one part of the total compensation package and ranges between $171,600 and $302,200, depending on skills, qualifications, experience, and location. Eligible for discretionary employee stock programs, including restricted stock units and Employee Stock Purchase Plan eligibility. Benefits include comprehensive medical and dental coverage, retirement benefits, discounted products and services, and education-related reimbursement. This role may be eligible for discretionary bonuses or relocation benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. EEO and Compliance
Apple is an equal opportunity employer committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple participates in the E-Verify program in certain locations as required by law. Apple is committed to providing reasonable accommodation to applicants with physical and mental disabilities. Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment. An employer who violates this law may face penalties and civil liability.
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