Synaptics Incorporated
Sr. Manager, Test Development Engineering
Synaptics Incorporated, San Jose, California, United States, 95123
Synaptics is leading the charge in AI at the Edge, bringing AI closer to end users and transforming how we engage with intelligent connected devices, whether at home, at work, or on the move. As the go-to partner for the world’s most forward-thinking product innovators, Synaptics powers the future with its cutting-edge Synaptics Astra AI-Native embedded compute, Veros wireless connectivity, and multimodal sensing solutions. We’re making the digital experience smarter, faster, more intuitive, secure, and seamless. From touch, display, and biometrics to AI-driven wireless connectivity, video, vision, audio, speech, and security processing, Synaptics is the force behind the next generation of technology enhancing how we live, work, and play.
Make sure to apply with all the requested information, as laid out in the job overview below. Overview Synaptics is seeking an experienced Sr. Manager, Test Development with deep expertise in wireless RF SoC test (Wi-Fi, Bluetooth, GPS, UWB) to lead our test engineering team. This role combines technical leadership and hands-on engineering to deliver high-quality test solutions from new product introduction through high-volume production. The ideal candidate will have a strong background in ATE test development (Teradyne UltraFLEX, Advantest V93000, or similar), proven ability to lead cross-functional teams, and a track record of driving yield, cost, and quality improvements in high-volume manufacturing. This position reports to the VP of Operations NPI Engineering. The typical base pay range for this position is USD $144,000 - $226,600 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Responsibilities & Competencies Job Duties Lead, mentor, and develop a team of test engineers, fostering technical growth and collaboration Set priorities, allocate resources, and drive timely execution of test deliverables aligned to program milestones Collaborate with design and product engineering teams to develop and optimize test programs and drive standardization of test methodologies across teams and products for RF-enabled digital and mixed-signal SoCs Oversee development, debug, and release of test programs on Teradyne UltraFLEX and Advantest V93000 (Smartest 7/8) platforms Ensure smooth integration of test programs into high-volume manufacturing with OSATs and foundry partners Apply strong knowledge of RF fundamentals, digital/analog test, and DFT methodologies to maximize coverage and efficiency Manage post-silicon validation and silicon bring-up and lead root cause analysis of marginalities, yield loss, performance drifts, RMAs, and test escapes and product/foundry interface Oversee correlation of lab bench and ATE results to ensure alignment across environments Debug silicon, test hardware, and ATE setups to ensure stability, throughput, and cost efficiency Analyze large-scale production test data to identify trends, optimize binning strategies, and drive test time reductions Lead initiatives in test automation, DFT adoption, and tool development to enhance productivity Competencies Strong understanding of digital/analog fundamentals, DFT, and manufacturing concepts Team builder and strong leader – hiring and developing talent, vision to inspire and excite team, and management of performance Experience in working collaboratively and leading a diverse, global cross-functional team Passionate about building great products and solving customer and business problems Ability to rapidly learn new technologies Analytical and able to make informed decisions based on experience Demonstrated ability to use data to improve processes and evaluate design options Excellent organizational, planning, and documentation skills with high attention to detail and the ability to manage multiple projects simultaneously in a fast-paced environment Able to solve problems and drive root-cause resolution for issues that are not clearly defined and require in-depth understanding of technology and organizational objectives; unafraid to ask questions and explore new ideas Excellent verbal and written communication that is clear, concise, and compelling Qualifications (Requirements) Bachelor’s (or Master’s) degree in Electrical Engineering, Computer Engineering, or related field or equivalent 12+ years of experience in SoC/silicon test engineering with 5+ years in technical leadership or management roles Hands-on experience with wireless RF test (Wi-Fi, Bluetooth, GPS, UWB) on ATE platforms (Teradyne UltraFLEX, Advantest V93000) Exposure to high-speed PHYs (DDR, PCIe, MIPI, etc.) alongside RF interfaces Deep expertise in silicon debug, failure analysis, yield enhancement, and high-volume production test Proven success collaborating with foundries, OSATs, and manufacturing partners Demonstrated track record of leading organizational change and implementing process improvements No travel required Belief in Diversity: Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.
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Make sure to apply with all the requested information, as laid out in the job overview below. Overview Synaptics is seeking an experienced Sr. Manager, Test Development with deep expertise in wireless RF SoC test (Wi-Fi, Bluetooth, GPS, UWB) to lead our test engineering team. This role combines technical leadership and hands-on engineering to deliver high-quality test solutions from new product introduction through high-volume production. The ideal candidate will have a strong background in ATE test development (Teradyne UltraFLEX, Advantest V93000, or similar), proven ability to lead cross-functional teams, and a track record of driving yield, cost, and quality improvements in high-volume manufacturing. This position reports to the VP of Operations NPI Engineering. The typical base pay range for this position is USD $144,000 - $226,600 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Responsibilities & Competencies Job Duties Lead, mentor, and develop a team of test engineers, fostering technical growth and collaboration Set priorities, allocate resources, and drive timely execution of test deliverables aligned to program milestones Collaborate with design and product engineering teams to develop and optimize test programs and drive standardization of test methodologies across teams and products for RF-enabled digital and mixed-signal SoCs Oversee development, debug, and release of test programs on Teradyne UltraFLEX and Advantest V93000 (Smartest 7/8) platforms Ensure smooth integration of test programs into high-volume manufacturing with OSATs and foundry partners Apply strong knowledge of RF fundamentals, digital/analog test, and DFT methodologies to maximize coverage and efficiency Manage post-silicon validation and silicon bring-up and lead root cause analysis of marginalities, yield loss, performance drifts, RMAs, and test escapes and product/foundry interface Oversee correlation of lab bench and ATE results to ensure alignment across environments Debug silicon, test hardware, and ATE setups to ensure stability, throughput, and cost efficiency Analyze large-scale production test data to identify trends, optimize binning strategies, and drive test time reductions Lead initiatives in test automation, DFT adoption, and tool development to enhance productivity Competencies Strong understanding of digital/analog fundamentals, DFT, and manufacturing concepts Team builder and strong leader – hiring and developing talent, vision to inspire and excite team, and management of performance Experience in working collaboratively and leading a diverse, global cross-functional team Passionate about building great products and solving customer and business problems Ability to rapidly learn new technologies Analytical and able to make informed decisions based on experience Demonstrated ability to use data to improve processes and evaluate design options Excellent organizational, planning, and documentation skills with high attention to detail and the ability to manage multiple projects simultaneously in a fast-paced environment Able to solve problems and drive root-cause resolution for issues that are not clearly defined and require in-depth understanding of technology and organizational objectives; unafraid to ask questions and explore new ideas Excellent verbal and written communication that is clear, concise, and compelling Qualifications (Requirements) Bachelor’s (or Master’s) degree in Electrical Engineering, Computer Engineering, or related field or equivalent 12+ years of experience in SoC/silicon test engineering with 5+ years in technical leadership or management roles Hands-on experience with wireless RF test (Wi-Fi, Bluetooth, GPS, UWB) on ATE platforms (Teradyne UltraFLEX, Advantest V93000) Exposure to high-speed PHYs (DDR, PCIe, MIPI, etc.) alongside RF interfaces Deep expertise in silicon debug, failure analysis, yield enhancement, and high-volume production test Proven success collaborating with foundries, OSATs, and manufacturing partners Demonstrated track record of leading organizational change and implementing process improvements No travel required Belief in Diversity: Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.
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