IBM Corporation is hiring: Hardware Test Lead in Austin

Overview

IBM Corporation, Austin, TX: Develop python API (Application Programming Interface) for functional test development for Burn-In tests which includes IML (initial Machine load) in Burn-In mode, logic built in test, array built in test run IDLE test for Power and Telum chips for high stress conditions while bypassing PLLs (Phase locked loop). Develop the python codebase for RBI run time Burn-In tests which includes runtime Burn-In IML, an Active Reliability Monitor with array and logic built in test and array repair with active clocking. Perform End-to-End simulation regression pre silicon using FPGA (field programmable gate array) boards emulating processor chip models for Burn-In tests and RBI tests. Perform design verification for Chip level I/Os such as PCIe (Peripheral Component Interconnect) and Memory Bus using MESA simulation environment and by collecting AETs. Perform pre-tests on wafers during wafer bring up for all Burn-In related tests including IML array built in test, and logic built in tests. Use critical thinking to debug tools to determine root cause or issues and develop solutions for them. Perform Burn-In tests on modules to improve shipped product quality level, reliability, and serviceability to P&Z system chips. Debug test issues found during module test bringup. Lead a team to further develop the burn-in test environment to accelerate defects in chips by applying stress conditions such as high temperature and high voltage. Utilize: API (Application Programming Interface), Cadence Modus tool, Unix/Linux operating system skills, C++, Python programming skills, Microprocessor architecture, Digital logic design, Git and Analog circuit skills.

Responsibilities

• Develop python API based solutions for Burn-In test environments and RBI runtime tests.
• Implement high-stress test scenarios for Power and Telum chips, including IML, logic built in test, and array built in test.
• Perform end-to-end pre-silicon simulation regression using FPGA boards with processor chip models for Burn-In and RBI tests.
• Conduct design verification for PCIe and Memory Bus I/Os using the MESA simulation environment and collect AETs.
• Perform wafer pre-tests during wafer bring-up for Burn-In related tests including IML and logic built in tests.
• Debug test issues, identify root causes, and develop solutions.
• Lead a team to enhance the burn-in test environment and accelerate defect discovery under stress conditions (high temperature, high voltage).
• Collaborate across teams with expertise in API, Cadence Modus, Unix/Linux, C++, Python, microprocessor architecture, digital logic design, Git, and analog circuits.

Qualifications

• Master’s degree or equivalent in Computer Engineering, Computer Science or related field (employer will accept a Bachelor's degree plus five (5) years of progressive experience in lieu of a Master’s degree) and one (1) year of experience as a Research Assistant, Test Analysis Engineer, Development Engineer, or related.
• One (1) year of experience must include utilizing API, Cadence Modus tool, Unix/Linux operating system skills, C++, Python programming skills, Microprocessor architecture, Digital logic design, Git and Analog circuit skills.

Compensation

$164,528 to $212,800 per year.

Application

Please send resumes to recruitad@us.ibm.com. Applicants must reference V233 in the subject line.