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ACL Digital

Senior Electrical Engineer - Advanced Semiconductor Packaging and Integration

ACL Digital, Santa Clara, California, us, 95053

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Job Description: Senior Electrical Engineer - Advanced Semiconductor Packaging and Integration

Company Overview Join our team and be at the forefront of semiconductor technology innovation. We are looking for a highly skilled Senior Engineer to contribute to our cutting-edge projects in Advanced Semiconductor Packaging and AI. You will work alongside some of the brightest minds in the industry and have the opportunity to make a significant impact on the future of AI. Position Overview We are seeking a Senior Electrical Engineer with a strong background in Advanced Semiconductor Electronics and ASIC Design. The ideal candidate will have extensive knowledge in mixed-signal design, chiplet design, and advanced packaging, with a deep understanding of BEOL and FEOL semiconductor processing. Responsibilities Lead the design and development of advanced semiconductor electronics and ASICs. Develop and optimize mixed-signal designs. Oversee semiconductor processing and advanced packaging technologies. Integrate HBM and LPDDR memory into system designs. Implement chiplet integration techniques focusing on high-speed chiplet I/O. Ensure signal and power integrity throughout the design process. utomate chip layout generation and format conversion. Design PCBs with a focus on performance and reliability. Conduct thermal simulations for optimal thermal management. Substrate design and documentation. Top-Level system design and floorplan. Overall ASIC and Chiplet design flow. rchitecture documentation. EDA tools setup. Collaborate with cross-functional teams for seamless integration and timely delivery. Mentor and guide junior engineers. Requirements

M.S in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in advanced semiconductor electronics and ASIC design. Proficiency in mixed-signal design and semiconductor processing techniques. Strong knowledge of advanced packaging technologies, including HBM and LPDDR integration. Experience with chiplet integration and high-speed chiplet I/O. Expertise in signal integrity, power integrity, and automated chip layout generation. Proven track record in PCB design and thermal simulations. Excellent leadership, communication, and project management skills. Preferred Qualifications

Ph.D. in a relevant field. Experience with leading industry-standard design and simulation tools. Published works or patents in semiconductor technologies.