Jobs via Dice
Overview
Wise Equation Solutions Inc. is seeking a Validation Engineer with expertise in digital design concepts, RTL design (Verilog/VHDL), formal verification, and related areas. Apply via Dice. Responsibilities
Perform formal verification using tools (e.g., JasperGold, Questa Formal, OneSpin, Synopsys VC Formal). Write formal properties/assertions (SVA, PSL, or similar). Conduct simulation-based verification (UVM, SystemVerilog). Work on processor, memory, or interface IP verification as applicable. Qualifications
Solid understanding of digital design concepts, RTL design (Verilog/VHDL), and computer architecture. Hands-on experience with formal verification tools. Proficiency in writing formal properties/assertions (SVA, PSL, or similar). Strong analytical and problem-solving skills; excellent communication and teamwork abilities. Familiarity with scripting languages (Python, Perl, Tcl) for automation. Experience with simulation-based verification (UVM, SystemVerilog). Prior experience in processor, memory, or interface IP verification.
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Wise Equation Solutions Inc. is seeking a Validation Engineer with expertise in digital design concepts, RTL design (Verilog/VHDL), formal verification, and related areas. Apply via Dice. Responsibilities
Perform formal verification using tools (e.g., JasperGold, Questa Formal, OneSpin, Synopsys VC Formal). Write formal properties/assertions (SVA, PSL, or similar). Conduct simulation-based verification (UVM, SystemVerilog). Work on processor, memory, or interface IP verification as applicable. Qualifications
Solid understanding of digital design concepts, RTL design (Verilog/VHDL), and computer architecture. Hands-on experience with formal verification tools. Proficiency in writing formal properties/assertions (SVA, PSL, or similar). Strong analytical and problem-solving skills; excellent communication and teamwork abilities. Familiarity with scripting languages (Python, Perl, Tcl) for automation. Experience with simulation-based verification (UVM, SystemVerilog). Prior experience in processor, memory, or interface IP verification.
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