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Intel

MCP Emulation Verification Engineer

Intel, Santa Clara, California, us, 95053

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Overview

Do Something Wonderful! Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Who We Are

Our team mainly works on Xeon servers. The work involves SOC level pre-si validation using emulation and also acts as a bridge between the IP/die validation and post-silicon teams. Our team focuses on validation of end-to-end validation. Who You Are

Your responsibilities will include but are not limited to: Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, micro-architects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drive technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages and proliferates to future products. Qualifications

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications

The candidate must have a Bachelor’s Degree in Computer Engineering/Computer Science/Electrical Engineering or STEM related field with 3+ years of relevant experience -OR- Master’s Degree in Computer Engineering/Computer Science/Electrical Engineering or STEM related field with 2+ years of relevant experience 2+ years of work experience in Pre-Silicon Validation on Emulation 2+ years of work experience in complex SOC validation with multiple IPs Preferred Qualifications

Experience with Synopsys simulation and coverage tools. Assertion based verification Knowledge in RTL, Verilog, VHDL Experience in validation at MCP Experience with pre-Si verification with System Verilog OVM/UVM on content development Scripting languages such as Python, Simics. Knowledge of CPU architecture and X86 Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 Annual Salary Range for jobs which could be performed in the US: $133,050.00-$187,840.00 Salary range dependent on a number of factors including location and experience. Work Model

This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

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