NVIDIA
Overview
NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions. We are looking for individuals who want to deliver innovative products and help build the next generation of life-changing custom SOCs. If you are motivated, understand how complex SOCs and IPs are built, and grasp client requirements and development cycles, this is your place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI). You will verify cache protocol compliance and ensure coherency across CPU and GPU memory subsystems in complex memory hierarchies of high-performance ASIC designs. It requires deep knowledge of SystemVerilog, UVM, and C++, along with solid ASIC verification methodologies. Responsibilities
Responsible for ASIC design verification for various processing blocks within a SOC, with a strong focus on cache coherency protocols and complex memory hierarchies.
Develop and complete test plans for cache coherency verification of ASIC-based SoCs using UVM-based environments.
Design and implement constrained-random and directed SystemVerilog testbenches targeting multi-level cache hierarchies and interconnect fabric.
Collaborate extensively with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right verification plans and execution.
Drive the development of silicon and platform verification strategies and methodologies.
Qualifications
B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
8+ years of experience in ASIC verification, particularly in cache coherency or memory subsystem verification.
Strong knowledge of System Verilog and UVM methodology.
Hands-on experience with AMBA protocols, especially AXI, ACE, and CHI, demonstrating a strong background with AMBA protocols such as AXI, CHI, ATB, etc.
Familiarity with SoC architectures, memory models, and CPU-cache interactions.
Proficiency in scripting languages (Python, Perl, TCL) and working knowledge of C/C++ for testbench or model integration.
Ways to stand out from the crowd
Experience with formal verification or assertion-based verification (SVA).
Knowledge of RISC-V or ARM architecture and system-level cache subsystems.
Exposure to coherency modeling tools, verification IPs, or emulation platforms (e.g., Palladium, Veloce).
Experience in GPU-based verification is desirable.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until September 23, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions. We are looking for individuals who want to deliver innovative products and help build the next generation of life-changing custom SOCs. If you are motivated, understand how complex SOCs and IPs are built, and grasp client requirements and development cycles, this is your place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI). You will verify cache protocol compliance and ensure coherency across CPU and GPU memory subsystems in complex memory hierarchies of high-performance ASIC designs. It requires deep knowledge of SystemVerilog, UVM, and C++, along with solid ASIC verification methodologies. Responsibilities
Responsible for ASIC design verification for various processing blocks within a SOC, with a strong focus on cache coherency protocols and complex memory hierarchies.
Develop and complete test plans for cache coherency verification of ASIC-based SoCs using UVM-based environments.
Design and implement constrained-random and directed SystemVerilog testbenches targeting multi-level cache hierarchies and interconnect fabric.
Collaborate extensively with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right verification plans and execution.
Drive the development of silicon and platform verification strategies and methodologies.
Qualifications
B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
8+ years of experience in ASIC verification, particularly in cache coherency or memory subsystem verification.
Strong knowledge of System Verilog and UVM methodology.
Hands-on experience with AMBA protocols, especially AXI, ACE, and CHI, demonstrating a strong background with AMBA protocols such as AXI, CHI, ATB, etc.
Familiarity with SoC architectures, memory models, and CPU-cache interactions.
Proficiency in scripting languages (Python, Perl, TCL) and working knowledge of C/C++ for testbench or model integration.
Ways to stand out from the crowd
Experience with formal verification or assertion-based verification (SVA).
Knowledge of RISC-V or ARM architecture and system-level cache subsystems.
Exposure to coherency modeling tools, verification IPs, or emulation platforms (e.g., Palladium, Veloce).
Experience in GPU-based verification is desirable.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until September 23, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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