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Intel

Emulation Model Build Engineer

Intel, Hillsboro, Oregon, United States, 97104

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Overview

Do Something Wonderful!

Intel focuses on engineering and building a better tomorrow. This role targets emulation model build and enablement for pre-Si validation of complex server SoCs. Who We Are

The Server Emulation CoE (Center of Excellence) Team builds, enables and supports emulation models for next-generation server SoCs. The CoE delivers models, develops testbenches and infrastructure, and collaborates with SoC architects, designers and validation teams to optimize emulation use for high-quality mission-critical products. Who You Are

This position focuses on emulation model build and enablement for pre-Si validation of complex server SoCs. Build emulation models

Develop emulation testbench and infrastructure

Participate in SoC bring-up of emulation models through BIOS boot and basic directed-test functionality

Root cause and debug testbench issues, emulator environment issues, RTL and firmware bugs

Work closely with pre-silicon emulation validation teams, providing guidance to verification teams for optimal use of emulation

Collaborate and communicate with SoC architects, micro-architects, RTL developers, firmware developers and performance engineers

Define and develop new capabilities to achieve better verification through improved emulation model usability

Improve emulation efficiency both during compilation and runtime

Strong communication skills and a team player

Ability to work independently and as part of a team in a fast-paced and dynamic environment

Attention to detail and a commitment to delivering high-quality work

Qualifications

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications

Bachelor\'s degree in Electrical Engineering, Computer Engineering or other relevant fields of study with 1+ years of relevant industry experience -OR- Master\'s degree in Electrical Engineering, Computer Engineering or other relevant field of study

1+ years of experience in IP or SOC validation

Preferred Qualifications

Experience in System Verilog

Experience in scripting languages such as Python, Perl etc.

Experience with Zebu/Palladium emulation

Experience with FPGA design and validation

Experience with In-Circuit Emulation and debug

Knowledge of Xeon x86 reset flow

Experience debugging RTL code using industry standard hardware simulation/emulation tools

Proficiency in using industry standard tools/flow such as Git, Make, TeamCity, Jenkins, JIRA, etc. for large SW development projects

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Please note: this posting does not include a live external link in this description. Annual Salary Range for jobs which could be performed in the US:

$115,290.00-$162,760.00 Salary range dependent on a number of factors including location and experience. Work Model

This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

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