Jobot
Overview
Senior Digital Design Engineer located in Seattle, WA. You will play a key role in developing the system architecture and RTL codebase for the FPGA module that performs localization and decodes packets from ground-based BLE device transmissions. You’ll collaborate with a cross-functional team of system, hardware, and software engineers to optimize throughput, accuracy, power efficiency, and reliability of the Hubble satellite constellation.
Base pay $180,000.00/yr
Location Seattle, WA
Responsibilities
Develop system architecture and RTL codebase for FPGA module related to localization and packet decoding.
Collaborate with cross-functional teams (systems, hardware, software) to optimize throughput, accuracy, power efficiency, and reliability of satellite systems.
Work in a fast-paced environment to support design, validation, and bring-up activities.
Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
5+ years of experience in FPGA-based digital design with emphasis on real-time signal processing and communication systems.
Proven expertise in RTL design (Verilog/SystemVerilog) for high-throughput, low-latency digital receivers.
Experience with DDR/DDR3/DDR4 memory interfaces, controller integration, timing constraints, and performance tuning.
Proficiency with high-speed serial interfaces (LVDS, SPI, I2C, UART, SERDES such as JESD204, PCIe, Ethernet).
FPGA synthesis, timing closure, and resource optimization (Xilinx or Intel/Altera).
Experience with simulation/verification tools (ModelSim, Questa, Vivado, VUnit) and scripting (Python, Tcl).
Deep understanding of DSP principles (filtering, correlation, decimation, fixed-point arithmetic).
Experience developing packet decoders for wireless protocols (BLE, ZigBee, LoRa, or custom PHYs).
Ability to work with RF, firmware, and systems engineers to validate end-to-end communication chains.
Strong interpersonal and communication skills; able to work independently and in cross-functional settings.
Willingness to thrive in a fast-paced, evolving environment and a passion for state-of-the-art hardware systems.
Desirable qualifications
Experience designing distributed DSP systems across multiple FPGAs or compute nodes.
Familiarity with ARM cores, peripheral interfacing (SPI, I2C, AXI), and embedded Linux (Petalinux).
Knowledge of synchronization techniques (preamble detection, symbol timing recovery, frequency offset correction).
Experience with lab tools (oscilloscopes, logic analyzers, RF test equipment).
Knowledge of low-power design for space-based or resource-constrained systems.
Familiarity with BLE PHY characteristics or similar short-range RF standards.
Benefits
Comprehensive health, dental, vision, and HSA options.
Unlimited PTO and parental leave.
Commuter benefits and learning & development allowance.
Health & wellness stipend and sabbatical program after five years.
Opportunities to work on cutting-edge space tech and participate in team retreats.
Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
Want to learn more about this role and Jobot? Click our Jobot logo and follow our LinkedIn page!
#J-18808-Ljbffr
Base pay $180,000.00/yr
Location Seattle, WA
Responsibilities
Develop system architecture and RTL codebase for FPGA module related to localization and packet decoding.
Collaborate with cross-functional teams (systems, hardware, software) to optimize throughput, accuracy, power efficiency, and reliability of satellite systems.
Work in a fast-paced environment to support design, validation, and bring-up activities.
Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
5+ years of experience in FPGA-based digital design with emphasis on real-time signal processing and communication systems.
Proven expertise in RTL design (Verilog/SystemVerilog) for high-throughput, low-latency digital receivers.
Experience with DDR/DDR3/DDR4 memory interfaces, controller integration, timing constraints, and performance tuning.
Proficiency with high-speed serial interfaces (LVDS, SPI, I2C, UART, SERDES such as JESD204, PCIe, Ethernet).
FPGA synthesis, timing closure, and resource optimization (Xilinx or Intel/Altera).
Experience with simulation/verification tools (ModelSim, Questa, Vivado, VUnit) and scripting (Python, Tcl).
Deep understanding of DSP principles (filtering, correlation, decimation, fixed-point arithmetic).
Experience developing packet decoders for wireless protocols (BLE, ZigBee, LoRa, or custom PHYs).
Ability to work with RF, firmware, and systems engineers to validate end-to-end communication chains.
Strong interpersonal and communication skills; able to work independently and in cross-functional settings.
Willingness to thrive in a fast-paced, evolving environment and a passion for state-of-the-art hardware systems.
Desirable qualifications
Experience designing distributed DSP systems across multiple FPGAs or compute nodes.
Familiarity with ARM cores, peripheral interfacing (SPI, I2C, AXI), and embedded Linux (Petalinux).
Knowledge of synchronization techniques (preamble detection, symbol timing recovery, frequency offset correction).
Experience with lab tools (oscilloscopes, logic analyzers, RF test equipment).
Knowledge of low-power design for space-based or resource-constrained systems.
Familiarity with BLE PHY characteristics or similar short-range RF standards.
Benefits
Comprehensive health, dental, vision, and HSA options.
Unlimited PTO and parental leave.
Commuter benefits and learning & development allowance.
Health & wellness stipend and sabbatical program after five years.
Opportunities to work on cutting-edge space tech and participate in team retreats.
Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
Want to learn more about this role and Jobot? Click our Jobot logo and follow our LinkedIn page!
#J-18808-Ljbffr