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Net2Source (N2S)

PCB Layout Engineer

Net2Source (N2S), San Francisco, California, United States, 94199

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Job Duration: Long-term Contract (12+ months) Pay rate: $70/hr on W2 & $80/hr on C2C Job Description: The ideal candidate will be capable of designing 20+ layer board designs. Key Duties and Responsibilities will include: Symbol creation, complete placement and layout of HDI circuit board designs and FPC’s with Cadence Allegro PCB Editor. Generate all Fab and Assembly Packages (ODB++ or IPC-2581). Interface with EE and ME staff for design development and solving board level related issues. Work in a collaborative environment with multiple designers on a single design. Qualifications: Proficient in Cadence Allegro PCB Editor and Constraint Management Experience with Analog design layout techniques Experience with RF design layout techniques (plus) Experience with Switch Mode Power Supply layout techniques Experience with Impedance Control and Transmission Line Theory Experience with Downstream BluePrint and CAM350 (plus) Excellent organization and communications skills Ability to work well with a diverse group of dedicated professionals Required Experience: 10+ Years Industry Experience performing PCB Design using Cadence Allegro PCB Editor Seniority level:

Mid-Senior level Employment type:

Contract Job function:

Information Technology Industries:

Information Services

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