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Seneca Resources

Modeling/Verification Engineer

Seneca Resources, Santa Clara, California, us, 95053

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Job Description

Seneca Resources is seeking a highly skilled and detail-oriented SystemC Modeling & Verification Engineer to join a cutting-edge team developing performance models for next-generation ASICs and system-level designs. This role is ideal for engineers with deep expertise in SystemC/TLM2, C/C++, and functional verification, who thrive in collaborative environments and are passionate about optimizing hardware simulation accuracy and performance. You’ll work closely with architecture, firmware, and hardware teams to build cycle-approximate models, validate functionality, and integrate your work into AMD’s internal tools and workflows. Key Responsibilities

Develop, enhance, and maintain SystemC/TLM2 models for memory controllers, peripherals, and interconnects Integrate models into AMD system-level design tools and ensure performance alignment Identify and resolve bottlenecks in simulation models to meet design specifications Create and execute testbenches for model validation and participate in system-level debugging Produce clear documentation including usage guidelines, design specifications, and performance metrics Deliver cycle-approximate performance models and support SV/UVM-based functional and performance verification Required Skills/Education

Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or related field 5+ years of experience in ASIC modeling and verification or software/firmware development in a hardware setting Strong proficiency in C/C++ development within a Linux environment Experience with SystemC, Verilog, SystemVerilog, and verification libraries such as UVM Familiarity with debug tools like GDB and Valgrind Knowledge of Perl, Makefiles, and scripting for automation Experience with DPI/PLI integration between C and Verilog environments Strong analytical skills and attention to detail Excellent written and verbal communication skills Preferred Knowledge

PCIe, AXI, and system interconnect protocols Work Details

Location:

Austin, TX (Hybrid) Clearance Requirements:

None Position Status:

Contract Pay Rate:

$60-65/hr on W2 We are an Equal Opportunity Employer and strongly encourage individuals of all races, ethnicities, genders, abilities, and backgrounds to apply.

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