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Cambridge Terahertz

RFIC/Mixed Signal Design Engineer

Cambridge Terahertz, Santa Clara, California, us, 95053

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RFIC/Mixed Signal Design Engineer

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Cambridge Terahertz

Company overview Cambridge Terahertz, based in Santa Clara, CA, is pioneering next-generation security with advanced Terahertz (THz) imaging technology, empowering safer communities through rapid, non-invasive weapons detection and threat screening. Our mission is to save lives by delivering breakthrough sensing solutions that uncover concealed threats—without health risks—enabling protection in airports, public venues, and critical infrastructure worldwide. Leveraging cutting-edge science spun out of MIT, our team is driven by a vision to transform security and safety with innovative platforms that truly make a difference. Our world-class team includes top minds in RF, THz and hardware, and we foster a creative, fast-paced, and values-driven culture that nurtures self-growth and learning.

We are an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information.

Job Description: RFIC/Mixed Signal Design Engineer This is a full-time, hands-on Silicon Design Engineer role in Santa Clara, CA, requiring substantial on-site presence. The ideal candidate is a versatile RFIC/Mixed Signal design engineer, recently graduated (Master’s or PhD) with tapeout experience, who thrives working across RTL-GDS flows, physical design, and hands-on chip fabrication and testing. You will be a key member of the silicon team, collaborating closely with domain experts in digital, analog, and RF systems, and playing a direct role in prototyping, validating, and productizing custom high-frequency integrated circuits.

Responsibilities

Design and Verification: Architect, simulate, and implement silicon using RTL, mixed-signal, and full-custom flows for mmWave/THz RFICs and supporting digital subsystems.

Physical Design: Execute layout, extraction, and tapeout of RFICs using deep submicron CMOS, SOI, or similar processes; manage parasitic modeling and EM verification.

EDA Tool Utilization: Work daily with Cadence, Synopsys, Mentor, and industry-standard simulation/layout suites.

Lab Testing: Set up hands-on lab experiments for silicon validation—using network analyzers, probe stations, and measurement equipment to characterize chips and system blocks.

Cross-functional Collaboration: Interface with software, hardware, and test engineers to deliver robust system-level solutions, from schematic through shippable product.

Documentation & Review: Prepare design documentation, participate in and lead technical reviews, and contribute to continuous improvement of engineering flows.

Job Requirements (Must have)

Green card holder or US Citizen

Experience executing multiple integrated circuit tapeouts in deep-submicron processes

Strong expertise in RF/microwave, mixed-signal and digital IC design, including RTL to GDSII and physical layout

Practical proficiency with EDA tools (Synopsys, Calibre/ICV, SPICE, EM simulators)

Working knowledge of physical design flows and full-custom silicon implementation

Hands-on experience characterizing chips in lab settings—measurement of S-parameters, NF, P1dB, etc.

Excellent documentation, teamwork, and communication skills

Strong communication and team collaboration skills

Leadership skills, ability to work independently in a fast-paced startup environment

M.S. or PhD in Electrical Engineering, Computer Engineering, or related field (RFIC/Mixed Signal design preferred)

Also desired (Nice to have)

Previous internship/research in RFIC or mmWave/THz silicon implementation

Experience with chip bring-up and debug in a lab

Broad understanding of RF parameters and their physical measurement

Familiarity with electromagnetics modeling tools such as RFPro and HFSS

Demonstrated flexibility in switching between design, simulation, layout, and lab work

Experience working in deeptech hardware startups

Experience with semiconductor packaging

Competitive base salary, health and retirement benefits, equity in a rapidly growing company

Fast-paced, high-impact environment with mentorship from top-tier experts

Opportunity to work at the bleeding edge of wireless and imaging silicon technology

Company details Seniority level: Entry level

Employment type: Full-time

Job function: Engineering and Information Technology

Industries: Computers and Electronics Manufacturing

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