Ventana Micro Systems
CPU/SOC Power Analysis & Optimization Engineer
Ventana Micro Systems, Cupertino, California, United States, 95014
CPU/SOC Power Analysis & Optimization Engineer
Join to apply for the
CPU/SOC Power Analysis & Optimization Engineer
role at
Ventana Micro Systems Continue with Google Continue with Google CPU/SOC Power Analysis & Optimization Engineer
4 months ago Be among the first 25 applicants Join to apply for the
CPU/SOC Power Analysis & Optimization Engineer
role at
Ventana Micro Systems Ventana is building the highest-performance RISC-V CPUs on the planet—designed for data center, AI, and edge workloads, with real silicon, not slideware.
Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at AppliedMicro)—bringing decades of CPU innovation to a clean-slate, open-standards future. You can check us out here: Ventana Micro - YouTube
CPU/SOC Power Analysis & Optimization Engineer:
For this role, the candidate must have strong analytical skills and background in power, micro-architecture and scripting to support the following activities on CPU, Compute Subsystem, and SOC designs:
Characterization and development of dynamic power estimation and management features Develop energy models for early power estimation, what-if analysis and power targets Support RTL and gate-level power rollup and analysis Analyze various workloads to identify power reduction opportunities Evaluate, evangelize, and implement power optimizations in both RTL and gates Identify best power sign-off tests to improve power analysis coverage Develop flows & heuristics to accelerate power triage on large power data sets Present power results on a regular basis
Qualifications Required:
8+ years industry experience with high performance CPU or GPU, memory subsystem, or related system-level designs Bachelors or Masters degree in related engineering field Strong domain knowledge of computer architecture Knowledge of low power ASIC design and implementation techniques Ability to work independently and across geographies Excellent communication skills, self-motivated and well organized
Skills Desired:
Verilog/SystemVerilog development experience Industry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systems Experience with a broad range of high frequency design considerations (timing, multiple clock domains, clock distribution) including power. Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and route Experience in compiled and/or interpreted (Python, perl) languages Experience in product level power budgeting and projection Experience in Joules, PowerArtist, PTPX or similar power analysis tools Experience in data mining applications to power modeling & triage Experience in power use-case definition and analysis Experience in post-silicon power correlation is a plus Experience in power management techniques is a plus
BASE SALARY RANGE
$115,000 TO $268,000 per year
EEOE
Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.
COVID-19
Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.
NOTICE: External Recruiters/ Staffing Agencies:
Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.
Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website. Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Engineering and Information Technology Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at Ventana Micro Systems by 2x Get notified about new Optimization Engineer jobs in
Cupertino, CA . Distinguished Engineer, Demand and Capacity Planning
Mountain View, CA $140,000 - $300,000 1 week ago Machine Learning Engineer II - Autonomous Mobility and Delivery
Sunnyvale, CA $167,000 - $185,500 3 days ago Sunnyvale, CA $167,000 - $185,500 5 days ago Software Engineer, Computational Photography, Advanced Camera Algorithm Team
Mountain View, CA $197,000 - $291,000 1 week ago Machine Learning Engineer, Forecast Platform
LLM Algorithmic Optimization Engineer - Intern
Process Engineer III, New College Graduate – (E3)
Santa Clara, CA $124,000.00 - $171,000.00 5 days ago Machine Learning Engineer, Motion Planning, Self-Driving
Process Engineer III, New College Graduate – (E3)
Research Engineer - Performance Optimization
Machine Learning Engineer, ML Runtime & Optimization
Fremont, CA $140,000.00 - $250,000.00 3 days ago Mountain View, CA $199,295.00 - $264,500.00 2 months ago Fremont, CA $140,000.00 - $259,000.00 1 week ago Machine Learning Engineer, AI Decisioning
Sunnyvale, CA $117,000.00 - $137,000.00 11 hours ago Sunnyvale, CA $117,000.00 - $137,000.00 2 weeks ago Machine Learning Engineer, Behavior Planning & Prediction
Fremont, CA $100,000.00 - $220,000.00 5 days ago Fremont, CA $70,000.00 - $130,000.00 1 week ago Palo Alto, CA $140,000.00 - $205,000.00 2 weeks ago Mountain View, CA $159,053.00 - $199,295.00 2 months ago Fremont, CA $117,000 - $137,000 2 weeks ago Senior Electric Powertrain Optimization Engineer
Behavior Planning Engineer, Autonomous Driving
Product Design Engineer (Mechanical/Mechatronics)
Milpitas, CA $114,100 - $194,000 6 days ago Principal Engineer, Industrial Engineering - Capital and Capacity Planning
San Jose, CA $108,545 - $153,700 1 week ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr
Join to apply for the
CPU/SOC Power Analysis & Optimization Engineer
role at
Ventana Micro Systems Continue with Google Continue with Google CPU/SOC Power Analysis & Optimization Engineer
4 months ago Be among the first 25 applicants Join to apply for the
CPU/SOC Power Analysis & Optimization Engineer
role at
Ventana Micro Systems Ventana is building the highest-performance RISC-V CPUs on the planet—designed for data center, AI, and edge workloads, with real silicon, not slideware.
Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at AppliedMicro)—bringing decades of CPU innovation to a clean-slate, open-standards future. You can check us out here: Ventana Micro - YouTube
CPU/SOC Power Analysis & Optimization Engineer:
For this role, the candidate must have strong analytical skills and background in power, micro-architecture and scripting to support the following activities on CPU, Compute Subsystem, and SOC designs:
Characterization and development of dynamic power estimation and management features Develop energy models for early power estimation, what-if analysis and power targets Support RTL and gate-level power rollup and analysis Analyze various workloads to identify power reduction opportunities Evaluate, evangelize, and implement power optimizations in both RTL and gates Identify best power sign-off tests to improve power analysis coverage Develop flows & heuristics to accelerate power triage on large power data sets Present power results on a regular basis
Qualifications Required:
8+ years industry experience with high performance CPU or GPU, memory subsystem, or related system-level designs Bachelors or Masters degree in related engineering field Strong domain knowledge of computer architecture Knowledge of low power ASIC design and implementation techniques Ability to work independently and across geographies Excellent communication skills, self-motivated and well organized
Skills Desired:
Verilog/SystemVerilog development experience Industry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systems Experience with a broad range of high frequency design considerations (timing, multiple clock domains, clock distribution) including power. Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and route Experience in compiled and/or interpreted (Python, perl) languages Experience in product level power budgeting and projection Experience in Joules, PowerArtist, PTPX or similar power analysis tools Experience in data mining applications to power modeling & triage Experience in power use-case definition and analysis Experience in post-silicon power correlation is a plus Experience in power management techniques is a plus
BASE SALARY RANGE
$115,000 TO $268,000 per year
EEOE
Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.
COVID-19
Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.
NOTICE: External Recruiters/ Staffing Agencies:
Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.
Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website. Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Engineering and Information Technology Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at Ventana Micro Systems by 2x Get notified about new Optimization Engineer jobs in
Cupertino, CA . Distinguished Engineer, Demand and Capacity Planning
Mountain View, CA $140,000 - $300,000 1 week ago Machine Learning Engineer II - Autonomous Mobility and Delivery
Sunnyvale, CA $167,000 - $185,500 3 days ago Sunnyvale, CA $167,000 - $185,500 5 days ago Software Engineer, Computational Photography, Advanced Camera Algorithm Team
Mountain View, CA $197,000 - $291,000 1 week ago Machine Learning Engineer, Forecast Platform
LLM Algorithmic Optimization Engineer - Intern
Process Engineer III, New College Graduate – (E3)
Santa Clara, CA $124,000.00 - $171,000.00 5 days ago Machine Learning Engineer, Motion Planning, Self-Driving
Process Engineer III, New College Graduate – (E3)
Research Engineer - Performance Optimization
Machine Learning Engineer, ML Runtime & Optimization
Fremont, CA $140,000.00 - $250,000.00 3 days ago Mountain View, CA $199,295.00 - $264,500.00 2 months ago Fremont, CA $140,000.00 - $259,000.00 1 week ago Machine Learning Engineer, AI Decisioning
Sunnyvale, CA $117,000.00 - $137,000.00 11 hours ago Sunnyvale, CA $117,000.00 - $137,000.00 2 weeks ago Machine Learning Engineer, Behavior Planning & Prediction
Fremont, CA $100,000.00 - $220,000.00 5 days ago Fremont, CA $70,000.00 - $130,000.00 1 week ago Palo Alto, CA $140,000.00 - $205,000.00 2 weeks ago Mountain View, CA $159,053.00 - $199,295.00 2 months ago Fremont, CA $117,000 - $137,000 2 weeks ago Senior Electric Powertrain Optimization Engineer
Behavior Planning Engineer, Autonomous Driving
Product Design Engineer (Mechanical/Mechatronics)
Milpitas, CA $114,100 - $194,000 6 days ago Principal Engineer, Industrial Engineering - Capital and Capacity Planning
San Jose, CA $108,545 - $153,700 1 week ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr