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Hudson River Trading

Hudson River Trading is hiring: Hardware Design Engineer - 2026 Grads in Chicago

Hudson River Trading, Chicago, IL, United States, 60290

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Overview

Join to apply for the Hardware Design Engineer - 2026 Grads role at Hudson River Trading.

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technology to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You’ll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial experience is necessary!

Responsibilities

  • Architect and design complex hardware systems on FPGA and/or ASIC.
  • Identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL.
  • Collaborate with a global, cross-disciplinary team to deliver high-performance compute solutions.
  • Communicate hardware designs at both high-level interfaces and low-level algorithms/circuits.
  • Analyze and resolve problems quickly to maintain performance and reliability.

Qualifications

  • Currently pursuing a Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2026.
  • Proficiency in SystemVerilog.
  • Deep knowledge of FPGA internals and/or ASIC primitives.
  • Excellent digital logic design, optimization, debugging and problem-solving skills.
  • Thorough understanding of computer architecture and vendor tool suites.
  • Familiarity with C++ and/or Python.
  • Comfortable working in a Linux environment.
  • Previous internship experience in digital logic design.
  • Experience with networking protocols, CPU design, and/or machine learning accelerators is a plus.

Compensation

Annual base salary range of $175,000 to $250,000. Pay (base and bonus) may vary depending on job-related skills and experience. A sign-on and discretionary performance bonus will be provided as part of the total compensation package, in addition to company-paid medical and/or other benefits.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. We are a diverse, inclusive workplace with offices around the globe. HRT is an equal opportunity employer.

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