Apple Inc.
SoC Design/Integration & Synthesis Engineer
Apple Inc., Cupertino, California, United States, 95014
Overview
SoC Design/Integration & Synthesis Engineer — Cupertino, California, United States Description
As an SOC/ASIC Integration & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design: Drive all front-end integration activities like Integration, Synthesis, UPF, Logical Equivalence, ECO, etc. Work closely on methodology improvements for improving synthesis QOR. Work on low power design, writing UPFs, and power intent verification at the chip level. Work on RTL integration, timing constraints, and synthesis of designs. Knowledge of FE flows like Lint & LEQ and scripting is a plus. Collaborate with other engineers within the SOC Design, SOC Design Verification, Emulation, STA, Power, and Physical Design teams. Minimum Qualifications
BS degree + 10 years of industry experience is required. Preferred Qualifications
Expertise in digital design integration, synthesis, UPF, timing analysis, and closure. Worked closely on improving low-power synthesis methodologies. Hands-on experience in all aspects of the chip development process with proficiency in front-end tools and methodologies. Experience with scripting languages like Perl, Tcl, or Python. RTL logic design or implementation experience on multi-million gate ASICs is a plus. Ability to communicate effectively across all internal groups. Attention to detail and a desire to learn. Familiarity with modern AI tools and platforms, with the ability to adapt and learn new AI technologies as they emerge. Compensation & Benefits
Apple notes that base pay is part of the total compensation package and is determined within a range. The base pay range for this role is between $181,100 and $318,400, and pay is based on skills, qualifications, experience, and location. Apple employees have opportunities to participate in discretionary stock programs, including restricted stock unit awards, and may purchase Apple stock through the Employee Stock Purchase Plan. Benefits include comprehensive medical and dental coverage, retirement benefits, product discounts, access to free services, and reimbursement for certain educational expenses related to advancing your career. This role may be eligible for discretionary bonuses or commission payments as well as relocation assistance. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
#J-18808-Ljbffr
SoC Design/Integration & Synthesis Engineer — Cupertino, California, United States Description
As an SOC/ASIC Integration & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design: Drive all front-end integration activities like Integration, Synthesis, UPF, Logical Equivalence, ECO, etc. Work closely on methodology improvements for improving synthesis QOR. Work on low power design, writing UPFs, and power intent verification at the chip level. Work on RTL integration, timing constraints, and synthesis of designs. Knowledge of FE flows like Lint & LEQ and scripting is a plus. Collaborate with other engineers within the SOC Design, SOC Design Verification, Emulation, STA, Power, and Physical Design teams. Minimum Qualifications
BS degree + 10 years of industry experience is required. Preferred Qualifications
Expertise in digital design integration, synthesis, UPF, timing analysis, and closure. Worked closely on improving low-power synthesis methodologies. Hands-on experience in all aspects of the chip development process with proficiency in front-end tools and methodologies. Experience with scripting languages like Perl, Tcl, or Python. RTL logic design or implementation experience on multi-million gate ASICs is a plus. Ability to communicate effectively across all internal groups. Attention to detail and a desire to learn. Familiarity with modern AI tools and platforms, with the ability to adapt and learn new AI technologies as they emerge. Compensation & Benefits
Apple notes that base pay is part of the total compensation package and is determined within a range. The base pay range for this role is between $181,100 and $318,400, and pay is based on skills, qualifications, experience, and location. Apple employees have opportunities to participate in discretionary stock programs, including restricted stock unit awards, and may purchase Apple stock through the Employee Stock Purchase Plan. Benefits include comprehensive medical and dental coverage, retirement benefits, product discounts, access to free services, and reimbursement for certain educational expenses related to advancing your career. This role may be eligible for discretionary bonuses or commission payments as well as relocation assistance. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
#J-18808-Ljbffr