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Ring Inc

Component Engineering Technical Leader – High Speed Interconnect

Ring Inc, San Jose, California, United States, 95199

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Component Engineering Technical Leader

High Speed Interconnect

Location:

San Jose, CA (Hybrid: 4+ days/week onsite)

Compensation:

$168K

$241K base + bonus + potential equity

Employment Type:

Full-time, Direct Hire

Industry:

Networking Hardware / Systems / Electronics

Confidential Client:

Leading global technology company Overview

A global technology innovator is seeking a

Component Engineering Technical Leader

to drive failure analysis and root cause investigations for high-speed interconnect components used in advanced networking systems. This is a

high-impact, cross-functional role

ideal for a hands-on engineer who thrives in fast-paced, escalated situations and has deep interconnect and FA expertise.

You'll act as the technical lead for

field, NPI, and reliability failure investigations , collaborating closely with design teams, global suppliers, and manufacturing partners. Your findings will directly influence product improvements, vendor accountability, and long-term reliability standards. Key Responsibilities

Lead full-cycle

failure analysis

of interconnect components (e.g., connectors, backplanes, cables)

Develop and execute

non-destructive and destructive

test strategies

Collaborate with vendors and internal labs to

identify root causes

and corrective actions

Present findings to senior stakeholders and drive cross-functional resolution

Improve FA methodologies and contribute to continuous process refinement Required Qualifications

10+ years

of experience in hardware engineering, failure analysis, or component engineering

Deep knowledge of

high-speed interconnects , materials, and manufacturing processes

Proficient in FA techniques and tools: X-ray, SEM, cross-sectioning, FMEA, 8D, DOE

Experience managing

supplier investigations

and holding vendors accountable

Strong communication skills and experience presenting to executive leadership Preferred Experience

Background in networking hardware or data center systems

Experience with PCB/PCBA assembly and signal integrity challenges

Prior work with major interconnect vendors (e.g., Molex, Amphenol, TE)

Exposure to customer-facing escalations or field failure management Work Environment & Benefits

Hybrid schedule:

Onsite in San Jose 4+ days/week (not remote)

Relocation assistance:

May be available for qualified candidates

Competitive base salary, annual bonus, and potential equity

Full medical/dental/vision, 401(k) match, paid sick leave, and volunteer time

Join a global engineering team solving some of the most complex system reliability challenges in the industry $160,000 - $240,000 a year

Compensation details:

160000-240000 Yearly Salary

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