Microsoft
Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft’s online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide. We are looking for passionate engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft’s state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft’s cloud business grows, the ability to deploy new offerings and hardware infrastructure on time, in high volume, with high quality and lowest cost is paramount. The Silicon, Manufacturing and Packaging Engineering (SMPE) team defines and delivers operational measures of success for hardware manufacturing, improves the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a customer-focused mindset to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a
Principal Silicon Debug Engineer
to join the team.
Responsibilities
This is a senior technologist role that will guide Microsoft’s strategy and execution on silicon debug, FA/FI and debug tool readiness.
Build end-to-end debug solutions: hardware, software, design collateral procurement, readiness for physical/electrical debug tools and physical FA readiness.
Apply experience in semiconductor debug, fault isolation, failure analysis and product engineering yield debug.
Develop new silicon debug methodologies for all test content types in the manufacturing flow.
Own root-cause analysis of key product issues, circuit marginalities, special circuit failures and translate them into corrective actions in design, design methodologies or the manufacturing test flow.
Work with ATE and analytical equipment to debug product issues and isolate failures.
Utilize best-in-class silicon debug tools and methodologies.
Demonstrate strong project leadership to manage external vendors, drive cross-functional teams and lead sub-projects within larger development programs.
Required Qualifications
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years of technical engineering experience; OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years of technical engineering experience; OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years of technical engineering experience; OR equivalent experience.
5+ years of experience in product and test engineering, specializing in silicon debug or FA/FI.
5+ years of experience building debug methodology solutions for complex state-of-the-art SoCs in advanced process nodes.
Other Requirements
Ability to meet Microsoft, customer and/or government security screening requirements. This includes, but is not limited to, the Microsoft Cloud Background Check, required upon hire/transfer and every two years thereafter.
Preferred Qualifications
Proven debug track record on complex SoCs.
Experience defining and coding debug tools.
Strong system-level debuggers with experience in debug tools and ATE/MFG exposure.
Experience with system-level debug and correlation to ATE.
Strong presentation and communication skills; ability to lead cross-functional teams and manage programs.
Experience in supply chain, vendors/partners, and IC production; requirements gathering and interfacing with customers.
DOE knowledge, statistics background; knowledge of DFT/DFM techniques; bring-up/debug and manufacturing test on ATEs.
Ability to drive development and bring up test content on mixed-signal IPs.
Pay and Benefits Silicon Engineering IC5 — The typical base pay range for this role across the U.S. is USD 139,900 – 274,800 per year. There are location-specific variations (e.g., San Francisco Bay Area and New York City metropolitan area). The base pay range in those locations is USD 188,000 – 304,200 per year. Some roles may be eligible for additional benefits and compensation. For more information, see the Microsoft corporate pay information.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws.
Application window: Microsoft will accept applications for the role until October 20, 2025.
Location notes: Seattle, WA; Bellevue, WA; Redmond, WA; other nearby locations may be considered.
Some content in the original listing includes additional postings and unrelated data. This refinement preserves the core job information and removes extraneous elements.
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The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft’s state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft’s cloud business grows, the ability to deploy new offerings and hardware infrastructure on time, in high volume, with high quality and lowest cost is paramount. The Silicon, Manufacturing and Packaging Engineering (SMPE) team defines and delivers operational measures of success for hardware manufacturing, improves the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a customer-focused mindset to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a
Principal Silicon Debug Engineer
to join the team.
Responsibilities
This is a senior technologist role that will guide Microsoft’s strategy and execution on silicon debug, FA/FI and debug tool readiness.
Build end-to-end debug solutions: hardware, software, design collateral procurement, readiness for physical/electrical debug tools and physical FA readiness.
Apply experience in semiconductor debug, fault isolation, failure analysis and product engineering yield debug.
Develop new silicon debug methodologies for all test content types in the manufacturing flow.
Own root-cause analysis of key product issues, circuit marginalities, special circuit failures and translate them into corrective actions in design, design methodologies or the manufacturing test flow.
Work with ATE and analytical equipment to debug product issues and isolate failures.
Utilize best-in-class silicon debug tools and methodologies.
Demonstrate strong project leadership to manage external vendors, drive cross-functional teams and lead sub-projects within larger development programs.
Required Qualifications
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years of technical engineering experience; OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years of technical engineering experience; OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years of technical engineering experience; OR equivalent experience.
5+ years of experience in product and test engineering, specializing in silicon debug or FA/FI.
5+ years of experience building debug methodology solutions for complex state-of-the-art SoCs in advanced process nodes.
Other Requirements
Ability to meet Microsoft, customer and/or government security screening requirements. This includes, but is not limited to, the Microsoft Cloud Background Check, required upon hire/transfer and every two years thereafter.
Preferred Qualifications
Proven debug track record on complex SoCs.
Experience defining and coding debug tools.
Strong system-level debuggers with experience in debug tools and ATE/MFG exposure.
Experience with system-level debug and correlation to ATE.
Strong presentation and communication skills; ability to lead cross-functional teams and manage programs.
Experience in supply chain, vendors/partners, and IC production; requirements gathering and interfacing with customers.
DOE knowledge, statistics background; knowledge of DFT/DFM techniques; bring-up/debug and manufacturing test on ATEs.
Ability to drive development and bring up test content on mixed-signal IPs.
Pay and Benefits Silicon Engineering IC5 — The typical base pay range for this role across the U.S. is USD 139,900 – 274,800 per year. There are location-specific variations (e.g., San Francisco Bay Area and New York City metropolitan area). The base pay range in those locations is USD 188,000 – 304,200 per year. Some roles may be eligible for additional benefits and compensation. For more information, see the Microsoft corporate pay information.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws.
Application window: Microsoft will accept applications for the role until October 20, 2025.
Location notes: Seattle, WA; Bellevue, WA; Redmond, WA; other nearby locations may be considered.
Some content in the original listing includes additional postings and unrelated data. This refinement preserves the core job information and removes extraneous elements.
#J-18808-Ljbffr