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Microchip Technology Inc

Senior Technical Staff Engineer - Verification (FPGA Design)

Microchip Technology Inc, Roseville, California, United States, 95678

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Overview Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip\'s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it\'s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description Microchip Technology Inc. has a Senior Technical Staff Engineer - PGA Design Verification opening. The successful candidate will be responsible for performing functional and logic verification of FPGA/SoC designs to ensure all specifications are met.

Ownership of FPGA verification architecture and develop plans (both chip level and block level), create test benches, to verify that blocks meet all microarchitecture specifications.

Perform emulations and simulations to verify the design and uncover critical bugs, investigate causes of issues found and propose corrective measures to fix test failures.

Collaborates and communicates with architects, ASIC and analog designers, and post silicon to gather and share information related to verification of FPGA/SoC blocks.

Thoroughly document test plans and lead technical reviews.

Constantly drive improvements and propose enhancements in existing functional verification methodology.

Update test plans based on post silicon validation, update test plan for missing coverages.

Mentor junior engineers and train them in industry standard methodology.

Requirements/Qualifications

Bachelor's, Master's or PhD in Electrical or Computer Science Engineering or any related field

12+ years of experience in verification of complex IPs and/or SOCs in several technology nodes including FinFet

Proficiency in UVM/SV constrained-random coverage-based design verification

Hands on experience with OVM/UVM, System Verilog, constrained random verification methodologies

Experience with assertions, formal verification, low power verification, gate level simulations, functional coverage, coverage analysis/closure, emulation platforms

Experience with regression management, performance analysis, Makefiles, basic Perl/Python scripting

Experience with several product cycles of complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure)

Excellent knowledge of complex SoC and CPU architecture, and experience with several protocols like PCI-e, USB, SATA, DDR, Gbe

Knowledge of security protocols and cryptography

Experience with Perl, C++ or other scripting languages

Strong communicator, able to clearly explain difficult concepts to several cross-functional teams and executives

Experience as technical verification lead of large teams dispersed over several geographical locations

Travel Time 0% - 25%

Physical Attributes Feeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements 15% standing, 15% walking, 70% sitting, 100% In doors; Usual business hours

Pay Range We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.*

*Range is dependent on numerous factors including job location, skills and experience.

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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