Jobs via Dice
Overview
ASIC/FPGA Design Engineer III position at Jobs via Dice. Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: Although this position does support some teleworking; the selected candidate will need to be located near our Lockheed Martin Space facility in Sunnyvale, CA; King of Prussia, PA; Denver, CO; or Highlands Ranch, CO, and be expected to work in the office as needed and as appropriate. About Lockheed Martin Space: Space is a critical domain, connecting our technologies, our security, and our humanity. We aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. We are creating future-ready solutions with a focus on resiliency and urgency through our 21st Century Security vision. What this role looks like: The Silicon Solutions team of Lockheed Martin Space is building a premier ASIC/FPGA team and is seeking a highly talented and motivated ASIC & FPGA Design Engineer who has a passion for microchip design and space. Responsibilities
Work with low SWaP, radiation hardened, space rated devices. Perform all aspects of ASIC and FPGA development through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux-based high-performance computing environment. Support technical reviews and present to internal and external stakeholders. Interface with an independent verification team who will be working in parallel, verifying the design. Qualifications
To be effective in this role, you will need:
You need to be an independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast-moving team. 5+ years professional experience; 3+ years with Masters degree. While no clearance is needed to start in this position, you will need to obtain and maintain a DoD Secret clearance, thus ship is required. Basic Qualifications Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education. Experience in the design of FPGAs, Digital ASICs, and Mixed-signal ASICs. HDL programming experience with VHDL, Verilog, and/or SystemVerilog. Linux development environment. Willing and able to obtain and maintain a DoD Secret clearance, thus ship is required for this position. Desired Skills Experience in ASIC/FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). FPGA/ASIC verification experience is a plus. Experience with electronics design and in lab integration and troubleshooting activities. Knowledge of space-grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero. Experience or knowledge of MS Project, JIRA. Experience with Earned Value Management System (EVMS). Experience mentoring junior engineers. EEO
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics. The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration. At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world\'s most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work. We provide diverse career opportunities designed to propel, develop, and boost agility, with flexible schedules, competitive pay, and comprehensive benefits. We foster an inclusive environment built upon integrity and corporate responsibility. Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings. Remote/Hybrid Work: Part-time Remote Telework available; the employee selected will work part of their schedule remotely and part at a designated Lockheed Martin facility. Specific weekly schedule will be discussed during the hiring process. Work Schedule Information: Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility. Schedules range from 40 hours over five days to condensed schedules. National Pay Statement: Pay ranges vary by location and state. Salary ranges provided in the posting are general guidelines and are subject to factors including location, responsibilities, experience, and market conditions. Benefits include Medical, Dental, Vision, Life Insurance, Disability, 401(k) match, FSA, Education Assistance, Parental Leave, PTO, and Holidays.
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ASIC/FPGA Design Engineer III position at Jobs via Dice. Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: Although this position does support some teleworking; the selected candidate will need to be located near our Lockheed Martin Space facility in Sunnyvale, CA; King of Prussia, PA; Denver, CO; or Highlands Ranch, CO, and be expected to work in the office as needed and as appropriate. About Lockheed Martin Space: Space is a critical domain, connecting our technologies, our security, and our humanity. We aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. We are creating future-ready solutions with a focus on resiliency and urgency through our 21st Century Security vision. What this role looks like: The Silicon Solutions team of Lockheed Martin Space is building a premier ASIC/FPGA team and is seeking a highly talented and motivated ASIC & FPGA Design Engineer who has a passion for microchip design and space. Responsibilities
Work with low SWaP, radiation hardened, space rated devices. Perform all aspects of ASIC and FPGA development through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux-based high-performance computing environment. Support technical reviews and present to internal and external stakeholders. Interface with an independent verification team who will be working in parallel, verifying the design. Qualifications
To be effective in this role, you will need:
You need to be an independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast-moving team. 5+ years professional experience; 3+ years with Masters degree. While no clearance is needed to start in this position, you will need to obtain and maintain a DoD Secret clearance, thus ship is required. Basic Qualifications Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education. Experience in the design of FPGAs, Digital ASICs, and Mixed-signal ASICs. HDL programming experience with VHDL, Verilog, and/or SystemVerilog. Linux development environment. Willing and able to obtain and maintain a DoD Secret clearance, thus ship is required for this position. Desired Skills Experience in ASIC/FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). FPGA/ASIC verification experience is a plus. Experience with electronics design and in lab integration and troubleshooting activities. Knowledge of space-grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero. Experience or knowledge of MS Project, JIRA. Experience with Earned Value Management System (EVMS). Experience mentoring junior engineers. EEO
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics. The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration. At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world\'s most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work. We provide diverse career opportunities designed to propel, develop, and boost agility, with flexible schedules, competitive pay, and comprehensive benefits. We foster an inclusive environment built upon integrity and corporate responsibility. Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings. Remote/Hybrid Work: Part-time Remote Telework available; the employee selected will work part of their schedule remotely and part at a designated Lockheed Martin facility. Specific weekly schedule will be discussed during the hiring process. Work Schedule Information: Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility. Schedules range from 40 hours over five days to condensed schedules. National Pay Statement: Pay ranges vary by location and state. Salary ranges provided in the posting are general guidelines and are subject to factors including location, responsibilities, experience, and market conditions. Benefits include Medical, Dental, Vision, Life Insurance, Disability, 401(k) match, FSA, Education Assistance, Parental Leave, PTO, and Holidays.
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