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Ciena Corporation

ASIC Verification Engineer

Ciena Corporation, Petaluma, California, United States, 94954

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This is a primary processing purpose. This is a secondary processing purpose. They gather information about your interactions on the site, such as which pages you visit frequently, how long you stay, and the links or buttons you click. They help us record any difficulties you have with the website and help us to evaluate the effectiveness of our advertising. By analyzing this data, we can understand what aspects of our site are effective and identify areas for improvement. This is a secondary processing purpose. This is a secondary processing purpose. ASIC Verification Engineer page is loaded ASIC Verification Engineer Postuler locations US- CA- Petaluma- 1465 N McDowell Blvd time type Full time posted on Publié hier job requisition id R028438 As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. As an ASIC Verification Engineer at Ciena, you play a crucial role in ensuring the quality and reliability of our ASIC components. Reporting to the Senior Manager of ASIC Engineering, you will craft and implement verification strategies that are essential to achieving high-performance, error-free hardware. Your work enables the robust functionality of Ciena's advanced networking technologies. How You Will Contribute: Develop robust test benches and tests for FPGAs and ASICs, utilizing advanced verification techniques to ensure design integrity. Assist in identifying and resolving RTL bugs, applying systematic approaches to maintain hardware efficiency and effectiveness. Create detailed verification models that simulate functional behaviors and predict potential failures, ensuring designs meet stringent quality standards. Draft comprehensive test plans that outline necessary tests and expected outcomes, guiding the verification process towards successful validation. Engage in thorough test plan and coverage analysis for block and SOC-level verification, ensuring comprehensive assessments and optimizations of our ASIC designs. The Must Haves: Bachelor / Master or PhD degree in Electrical Engineering coupled with proven experience in ASIC development with Verilog. Experience with ASIC design verification, synthesis, timing/power analysis and DFT. Minimum 5 years of work experience is required in ASIC Verification, including proficiency in UVM and System Verilog. Experience with modern SoC design architectures, ARM/MiPs type processor cores, Ethernet, Networking, and Data Communications. Strong debug and lab experience. Assets: Knowledge of high-performance and low-power design techniques. Knowledge of FPGA and emulation platforms. Knowledge of SOC architecture. Knowledge of assertion-based formal verification. Proficient with a scripting language like Perl. Salary Range: The annual salary range for this position in California is $113,200 - $180,800. Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available. Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence. Not ready to apply?

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At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is anEqual Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require. Emplois similaires(1)

ASIC Design Engineer locations US- CA- Petaluma- 1465 N McDowell Blvd time type Full time posted on Publié hier

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