Microchip Technology Inc.
Engineer I-Design (ASIC)
Microchip Technology Inc., San Jose, California, United States, 95199
Talent Acquisition Specialist at Microchip Technology Inc.
Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio includes general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, field‑programmable gate array (FPGA) products, and high‑performance linear, mixed‑signal, power management, and wireless connectivity devices.
We are seeking an Engineer I‑Design located in San Jose, CA. The successful candidate will design, simulate, and verify various RTL‑based blocks on our SOC devices.
Duties & Responsibilities Detailed module design, performance analysis, and design specification creation. RTL implementation, synthesis, simulation, pre‑layout/post‑layout timing verification. High‑speed design techniques to improve data and command processing bandwidth, reduce latencies, and increase reliability. Porting designs into test chips and emulation platforms; FPGA design and board implementation tools advantageous.
Requirements / Qualifications Bachelor’s in Electrical Engineering, Computer Engineering, or Computer Science. Design courses and practical application for high‑speed RTL design. RTL design tools: synthesis, formal verification, simulation, cross‑domain clocking analysis, static timing analysis. SystemVerilog development proficiency. Scripting languages (TCL / Perl / Python) and Linux proficiency. Ability to write detailed design specifications, clean presentations, and strong communication skills. Self‑motivated, proactive team player with ability to meet schedule requirements.
Preferred Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science. FPGA and ASIC System‑On‑Chip design experience. System‑level validation lab experience.
Travel Time 0% - 25%
Physical Requirements 80% sitting, 10% standing, 10% walking, 100% inside
Pay Range We offer a total compensation package that includes competitive base pay, restricted stock units, quarterly bonus payments, health benefits, retirement savings plans, and an industry‑leading ESPP program.
Annual base salary range for this position in California is $68,640 – $128,000.*
Equal Employment Opportunity Microchip Technology Inc. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.
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We are seeking an Engineer I‑Design located in San Jose, CA. The successful candidate will design, simulate, and verify various RTL‑based blocks on our SOC devices.
Duties & Responsibilities Detailed module design, performance analysis, and design specification creation. RTL implementation, synthesis, simulation, pre‑layout/post‑layout timing verification. High‑speed design techniques to improve data and command processing bandwidth, reduce latencies, and increase reliability. Porting designs into test chips and emulation platforms; FPGA design and board implementation tools advantageous.
Requirements / Qualifications Bachelor’s in Electrical Engineering, Computer Engineering, or Computer Science. Design courses and practical application for high‑speed RTL design. RTL design tools: synthesis, formal verification, simulation, cross‑domain clocking analysis, static timing analysis. SystemVerilog development proficiency. Scripting languages (TCL / Perl / Python) and Linux proficiency. Ability to write detailed design specifications, clean presentations, and strong communication skills. Self‑motivated, proactive team player with ability to meet schedule requirements.
Preferred Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science. FPGA and ASIC System‑On‑Chip design experience. System‑level validation lab experience.
Travel Time 0% - 25%
Physical Requirements 80% sitting, 10% standing, 10% walking, 100% inside
Pay Range We offer a total compensation package that includes competitive base pay, restricted stock units, quarterly bonus payments, health benefits, retirement savings plans, and an industry‑leading ESPP program.
Annual base salary range for this position in California is $68,640 – $128,000.*
Equal Employment Opportunity Microchip Technology Inc. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.
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