Qualcomm
Staff/ Sr. Staff Design Verification Engineer - QGOV
Qualcomm, San Diego, California, United States, 92189
Company
Qualcomm Technologies, Inc.
Job Area Engineering Group, Engineering Group > ASICS Engineering
Role
Familiarity with RTL design in Verilog and System Verilog
Develop verification methodology, ensuring scalable and portable environment across simulation and emulation.
Develop test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI, etc).
Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals
Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches
Develop and maintain emulation environment to collect metrics related to emulation environment.
Need to be in San Diego full time, 5 days a week
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
Must be a U.S. citizen and eligible to receive a U.S. Government security clearance
Required Qualifications
5+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture
5+ years of Design Verification, Emulation and Debug experience with simulation and emulation and prototyping flows
Relevant experience of 5+ yrs in any of the mentioned domain - Design/Verification/ Implementation
Preferred Qualifications
Knowledge of communication protocols such as AXI4-x, DDRx, PCIe, etc.
Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology
Good understanding of chip-level functional model building
Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C
Knowledge of Behavioral and Structural models and familiarity with simulation environments
Experience customizing and debugging make-based build flows and working with Xilinx’s Vivado tools
Experience with cm tools such as Git and Gerrit.
Experience in formal / static verification methodologies will be a plus
Experience with emulation platforms – Palladium, Zebu, Veloce, FPGAs.
Experience with synthesizing and optimizing designs and verification components developed in synthesizable Verilog.
Experience with C/C++ DPI transactors and monitors.
Develop and maintain emulation environment to collect metrics related to emulation environment.
Develop environment to run verification test cases, OS boot, performance benchmarks and other vectors.
Design, develop, and maintain CAD infrastructure for silicon design teams enabling bring up, test and debug automations.
Execute verification plans, including design bring-up, DV environment bring-up, regression enabling for all features under your care, debug of the test failures.
Experience with debugging tools such as JTAG and lab test equipment such as logic analyzers, oscilloscopes, signal generators, etc.
Experience with GLS, and scripting languages such as Perl, Python is a plus
Linux OS proficiency
The ideal candidate would be a self-starter with strong initiative, discipline, motivation, and a focus on quality.
The candidate must be a team player and be flexible and open to a variety of task assignments within the team.
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Pay Range And Other Compensation & Benefits $164,000.00 - $246,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
#J-18808-Ljbffr
Job Area Engineering Group, Engineering Group > ASICS Engineering
Role
Familiarity with RTL design in Verilog and System Verilog
Develop verification methodology, ensuring scalable and portable environment across simulation and emulation.
Develop test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI, etc).
Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals
Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches
Develop and maintain emulation environment to collect metrics related to emulation environment.
Need to be in San Diego full time, 5 days a week
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
Must be a U.S. citizen and eligible to receive a U.S. Government security clearance
Required Qualifications
5+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture
5+ years of Design Verification, Emulation and Debug experience with simulation and emulation and prototyping flows
Relevant experience of 5+ yrs in any of the mentioned domain - Design/Verification/ Implementation
Preferred Qualifications
Knowledge of communication protocols such as AXI4-x, DDRx, PCIe, etc.
Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology
Good understanding of chip-level functional model building
Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C
Knowledge of Behavioral and Structural models and familiarity with simulation environments
Experience customizing and debugging make-based build flows and working with Xilinx’s Vivado tools
Experience with cm tools such as Git and Gerrit.
Experience in formal / static verification methodologies will be a plus
Experience with emulation platforms – Palladium, Zebu, Veloce, FPGAs.
Experience with synthesizing and optimizing designs and verification components developed in synthesizable Verilog.
Experience with C/C++ DPI transactors and monitors.
Develop and maintain emulation environment to collect metrics related to emulation environment.
Develop environment to run verification test cases, OS boot, performance benchmarks and other vectors.
Design, develop, and maintain CAD infrastructure for silicon design teams enabling bring up, test and debug automations.
Execute verification plans, including design bring-up, DV environment bring-up, regression enabling for all features under your care, debug of the test failures.
Experience with debugging tools such as JTAG and lab test equipment such as logic analyzers, oscilloscopes, signal generators, etc.
Experience with GLS, and scripting languages such as Perl, Python is a plus
Linux OS proficiency
The ideal candidate would be a self-starter with strong initiative, discipline, motivation, and a focus on quality.
The candidate must be a team player and be flexible and open to a variety of task assignments within the team.
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Pay Range And Other Compensation & Benefits $164,000.00 - $246,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
#J-18808-Ljbffr