VIVA USA INC
Mixed Signal Verification Engineer – Hybrid
VIVA USA INC, San Jose, California, United States, 95199
Title: Mixed Signal Verification Engineer – Hybrid
Mandatory skills:
mixed signal circuits, SystemVerilog, modeling,
HDL, SPICE co-simulations, circuit schematic, analog integrated circuit design,
RTL design languages, checking tools, ESP,
CAD tools, mixed signal circuit schematic, debug
Description:
Mixed Signal Model Verification Engineer
We are seeking a detail-oriented mixed signal model engineer to verify behavioral models written in SystemVerilog, both logic and real number. It will involve writing constraints and stimulus for CAD tools to run equivalence check against the schematic. It is required to read and understand the mixed signal circuit schematic to debug any mismatch between behavioral model and circuit transistor-level behavior. Modification to the behavioral models to make it equivalent to the mixed signal circuit is expected.
MUST HAVE SKILLS:
Extensive experience in modeling mixed signal circuits in SystemVerilog, including real number modeling
Strong understanding of HDL/SPICE co-simulations
Strong understanding of custom circuit schematic
Strong background in analog integrated circuit design
Proficiency in RTL design languages like SystemVerilog
Experience with formal equivalence checking tools like ESP
Notes:
Hybrid
VIVA USA is an equal opportunity employer and is committed to maintaining a professional working environment that is free from discrimination and unlawful harassment. The Management, contractors, and staff of VIVA USA shall respect others without regard to race, sex, religion, age, color, creed, national or ethnic origin, physical, mental or sensory disability, marital status, sexual orientation, or status as a Vietnam-era, recently separated veteran, Active war time or campaign badge veteran, Armed forces service medal veteran, or disabled veteran. Please contact us at for any complaints, comments and suggestions.
Contact Details : Account co-ordinator: Godwin D Antony Raj
VIVA USA INC.
3601 Algonquin Road, Suite 425
Rolling Meadows, IL 60008
#J-18808-Ljbffr
mixed signal circuits, SystemVerilog, modeling,
HDL, SPICE co-simulations, circuit schematic, analog integrated circuit design,
RTL design languages, checking tools, ESP,
CAD tools, mixed signal circuit schematic, debug
Description:
Mixed Signal Model Verification Engineer
We are seeking a detail-oriented mixed signal model engineer to verify behavioral models written in SystemVerilog, both logic and real number. It will involve writing constraints and stimulus for CAD tools to run equivalence check against the schematic. It is required to read and understand the mixed signal circuit schematic to debug any mismatch between behavioral model and circuit transistor-level behavior. Modification to the behavioral models to make it equivalent to the mixed signal circuit is expected.
MUST HAVE SKILLS:
Extensive experience in modeling mixed signal circuits in SystemVerilog, including real number modeling
Strong understanding of HDL/SPICE co-simulations
Strong understanding of custom circuit schematic
Strong background in analog integrated circuit design
Proficiency in RTL design languages like SystemVerilog
Experience with formal equivalence checking tools like ESP
Notes:
Hybrid
VIVA USA is an equal opportunity employer and is committed to maintaining a professional working environment that is free from discrimination and unlawful harassment. The Management, contractors, and staff of VIVA USA shall respect others without regard to race, sex, religion, age, color, creed, national or ethnic origin, physical, mental or sensory disability, marital status, sexual orientation, or status as a Vietnam-era, recently separated veteran, Active war time or campaign badge veteran, Armed forces service medal veteran, or disabled veteran. Please contact us at for any complaints, comments and suggestions.
Contact Details : Account co-ordinator: Godwin D Antony Raj
VIVA USA INC.
3601 Algonquin Road, Suite 425
Rolling Meadows, IL 60008
#J-18808-Ljbffr