Cadence Design Systems Inc
Principal Application Engineer
Cadence Design Systems Inc, San Jose, California, United States, 95199
Overview
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
As an expert Digital Implementation and Signoff Field Applications Engineering (AE), you will work side-by-side with our leading edge customers. With your expertise, you''ll help them deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.
At Cadence, customers are at the heart of everything we do. Talented leaders like you enable us to materialize this passion into results by working directly with Cadence R&D and driving customer engagements.
Responsibilities
Be part of a team of Application Engineers providing technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff
Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
Collaborate with the team to conduct technical presentations and product demonstrations
Drive technical evaluations/benchmarks to success
Work closely with R&D to enhance the tools and methodologies to meet and exceed customer requirements
Drive adoption and proliferation of Cadence tools and technologies
Provide guidance to the team to amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows
Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements
Qualifications Minimum
10+ years of industry Physical Design experience
BS degree in Computer Science/Engineering, Electrical Engineering, or related field
Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis
Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure
Experience with advanced nodes 10nm and below
Experience in scripting languages such as Tcl/Perl/Python
Strong customer-facing communication and problem-solving skills
Strong personal drive for continuous learning and expanding professional skill sets
Strong verbal, written, and customer communication skills
Preferred
MS degree in Computer Science/Engineering, Electrical Engineering, or related field
Prior experience with IC digital implementation flows and front-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus, ICC/ICC2, DC, or PrimeTime
Experience with advanced nodes 5nm and below
The annual salary range for California is $123,200 to $228,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Our benefits programs include paid vacation and holidays, 401(k) with employer match, employee stock purchase plan, and medical/dental/vision options.
EEO and Accessibility Cadence is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, veteran status, disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer.
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As an expert Digital Implementation and Signoff Field Applications Engineering (AE), you will work side-by-side with our leading edge customers. With your expertise, you''ll help them deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.
At Cadence, customers are at the heart of everything we do. Talented leaders like you enable us to materialize this passion into results by working directly with Cadence R&D and driving customer engagements.
Responsibilities
Be part of a team of Application Engineers providing technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff
Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
Collaborate with the team to conduct technical presentations and product demonstrations
Drive technical evaluations/benchmarks to success
Work closely with R&D to enhance the tools and methodologies to meet and exceed customer requirements
Drive adoption and proliferation of Cadence tools and technologies
Provide guidance to the team to amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows
Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements
Qualifications Minimum
10+ years of industry Physical Design experience
BS degree in Computer Science/Engineering, Electrical Engineering, or related field
Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis
Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure
Experience with advanced nodes 10nm and below
Experience in scripting languages such as Tcl/Perl/Python
Strong customer-facing communication and problem-solving skills
Strong personal drive for continuous learning and expanding professional skill sets
Strong verbal, written, and customer communication skills
Preferred
MS degree in Computer Science/Engineering, Electrical Engineering, or related field
Prior experience with IC digital implementation flows and front-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus, ICC/ICC2, DC, or PrimeTime
Experience with advanced nodes 5nm and below
The annual salary range for California is $123,200 to $228,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Our benefits programs include paid vacation and holidays, 401(k) with employer match, employee stock purchase plan, and medical/dental/vision options.
EEO and Accessibility Cadence is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, veteran status, disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer.
#J-18808-Ljbffr