Jobs via Dice
Sr. SerDes Characterization and Validation Engineer (Silicon Engineering)
Jobs via Dice, Irvine, California, United States, 92713
Sr. SerDes Characterization and Validation Engineer (Silicon Engineering) – SpaceX
SpaceX is developing technologies to enable human life on Mars and deploy Starlink, the world's most advanced broadband internet system. We are seeking a motivated, proactive, and intellectually curious engineer to develop cutting-edge next-generation ASICs for space and ground infrastructure. You will work with cross-disciplinary teams to bring up, validate, and characterize high-speed SerDes blocks, influencing silicon testability and overall system performance. Responsibilities Bring up, validate and characterize high speed SerDes blocks in new and existing silicon chips Develop test methods to evaluate performance and calculate operating margins of high-speed SerDes across PVT and environmental conditions specific to space applications Collaborate with the ASIC design team to add/improve testability and define loopback and test infrastructure logic to ensure adequate silicon test coverage Work with the electrical design team to review signal integrity, power integrity, and radiated/conducted emissions concerns; propose design changes or workarounds Evaluate new SerDes IP from internal and external providers and test for logical and electrical compatibility with existing chips and FPGAs Write software routines (Python, C/C++) to bring up and validate the SerDes and help integrate SerDes drivers with software teams Basic Qualifications Bachelor's degree in an engineering discipline 5+ years of professional experience characterizing and/or validating SerDes IP Preferred Skills and Experience MS or PhD in electrical engineering, computer engineering, or computer science Experience with high-speed SerDes architectures (NRZ, PAM4) and protocols Working knowledge of SerDes blocks (CTLE, DFE, FFE, CDR, PLLs) and their characterization and debugging Experience with test and measurement equipment such as high-speed oscilloscopes and BER testers Understanding of SerDes calibration and equalization parameter selection Working knowledge of SerDes signal integrity eye diagrams, Bathtub curves, etc. Experience with Ethernet, PCIe and other high-speed protocol layers is a plus Ability to study internal and external resources to lead SerDes IP selections and discussions Experience writing comprehensive test reports covering boundary conditions and results Strong debugging and problem-solving skills Additional Requirements Must be willing to work extended hours and weekends as needed Compensation and Benefits Pay range: ASIC Validation Engineer/Senior: $160,000.00 - $220,000.00 per year Your actual level and base salary will be determined on a case-by-case basis and may vary based on job-related knowledge, education, and experience. Base salary is part of SpaceX’s total rewards package, which may include long-term incentives, stock options, discretionary bonuses, and an Employee Stock Purchase Plan, as well as comprehensive medical, vision, and dental coverage; a 401(k) plan; disability and life insurance; paid parental leave; and other discounts and perks. You may accrue 3 weeks of paid vacation and 10+ paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year. ITAR Requirements Learn more about ITAR requirements. SpaceX is an Equal Opportunity Employer and does not discriminate based on race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, or any other legally protected status. Applicants requiring reasonable accommodation should reach out for the application/interview process. Seniority level Mid-Senior level Employment type Full-time Job function Quality Assurance Industries Software Development
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SpaceX is developing technologies to enable human life on Mars and deploy Starlink, the world's most advanced broadband internet system. We are seeking a motivated, proactive, and intellectually curious engineer to develop cutting-edge next-generation ASICs for space and ground infrastructure. You will work with cross-disciplinary teams to bring up, validate, and characterize high-speed SerDes blocks, influencing silicon testability and overall system performance. Responsibilities Bring up, validate and characterize high speed SerDes blocks in new and existing silicon chips Develop test methods to evaluate performance and calculate operating margins of high-speed SerDes across PVT and environmental conditions specific to space applications Collaborate with the ASIC design team to add/improve testability and define loopback and test infrastructure logic to ensure adequate silicon test coverage Work with the electrical design team to review signal integrity, power integrity, and radiated/conducted emissions concerns; propose design changes or workarounds Evaluate new SerDes IP from internal and external providers and test for logical and electrical compatibility with existing chips and FPGAs Write software routines (Python, C/C++) to bring up and validate the SerDes and help integrate SerDes drivers with software teams Basic Qualifications Bachelor's degree in an engineering discipline 5+ years of professional experience characterizing and/or validating SerDes IP Preferred Skills and Experience MS or PhD in electrical engineering, computer engineering, or computer science Experience with high-speed SerDes architectures (NRZ, PAM4) and protocols Working knowledge of SerDes blocks (CTLE, DFE, FFE, CDR, PLLs) and their characterization and debugging Experience with test and measurement equipment such as high-speed oscilloscopes and BER testers Understanding of SerDes calibration and equalization parameter selection Working knowledge of SerDes signal integrity eye diagrams, Bathtub curves, etc. Experience with Ethernet, PCIe and other high-speed protocol layers is a plus Ability to study internal and external resources to lead SerDes IP selections and discussions Experience writing comprehensive test reports covering boundary conditions and results Strong debugging and problem-solving skills Additional Requirements Must be willing to work extended hours and weekends as needed Compensation and Benefits Pay range: ASIC Validation Engineer/Senior: $160,000.00 - $220,000.00 per year Your actual level and base salary will be determined on a case-by-case basis and may vary based on job-related knowledge, education, and experience. Base salary is part of SpaceX’s total rewards package, which may include long-term incentives, stock options, discretionary bonuses, and an Employee Stock Purchase Plan, as well as comprehensive medical, vision, and dental coverage; a 401(k) plan; disability and life insurance; paid parental leave; and other discounts and perks. You may accrue 3 weeks of paid vacation and 10+ paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year. ITAR Requirements Learn more about ITAR requirements. SpaceX is an Equal Opportunity Employer and does not discriminate based on race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, or any other legally protected status. Applicants requiring reasonable accommodation should reach out for the application/interview process. Seniority level Mid-Senior level Employment type Full-time Job function Quality Assurance Industries Software Development
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